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counters and info — Parallax Forums

counters and info

DXCDXC Posts: 33
edited 2010-08-15 20:49 in Propeller 1
People,

I like more info on counter with examples if possible.
Would it be possible to let 1 pin count to 4096 and the puls with another pin also set as a counter and the start counting to 4096 ......

All assembly ofcourse.

gr,

Comments

  • ElectricAyeElectricAye Posts: 4,561
    edited 2010-08-14 05:44
    Hi DXC,

    Yes, you can certainly count up to 4096.... and beyond if you want...

    check out the following document:
    http://www.parallax.com/Portals/0/Downloads/docs/prod/prop/PELabsFunBook-v1.1.pdf and see chapter 7, "Counter Modules and Circuit Applications Lab".

    It's presented in SPIN, however, and not assembly. But that should give you some idea of how the Propeller works with counters. Maybe somebody else on the forum can help you with the assembly aspects, since I don't know any.

    hope that helps,
    :)
  • DXCDXC Posts: 33
    edited 2010-08-14 13:44
    Hey AlectricAye,

    thnx for the explanating pdf, will look at it tommorow, it's now 22:39 here in holland.
    Dont know if I will understand it soon, have to do some examples.
    Also dont think its though to understand but just have to get a nice start.

    Think they are very handy for many tasks.

    gr,
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-08-14 14:52
    DXC, Welcome to the prop forum.

    IIRC there is an App Note AN001 on the counters and it should be downloaded with the PropTool. You may also try looking for the document section at the home page www.parallax.com

    You could also do what you want using the free-running counter CNT. There is a description in the propeller manual which is also downloaded with the PropTool. This is just a 32bit counter which increments every clock (80MHz = 12.5ns). So you could also use this to do what you require.

    I do not quite understand what you are trying to do. If you cannot work it out from the documents don't hesitate to post more info here for some more help.
  • DXCDXC Posts: 33
    edited 2010-08-14 16:23
    Hey Cluso99,

    I am controlling a tlc5940 now with 2cogs ,, 1 shifts data in and the other continously generates 4096 pulses on 1 pin at 5Mhz and after that it pulses another pin repeatetly.

    I think that when using a counter a for making 4096 pulses and then a counter b that pulses once if counter a gets at 4097.
    After that counter must be reset and start making 4096 pulses etc...
  • kuronekokuroneko Posts: 3,623
    edited 2010-08-14 19:05
    DXC wrote: »
    ... the other continously generates 4096 pulses on 1 pin at 5Mhz and after that it pulses another pin repeatetly.

    I think that when using a counter a for making 4096 pulses and then a counter b that pulses once if counter a gets at 4097.
    After that counter must be reset and start making 4096 pulses etc...

    What clock speed are running at (e.g. 80MHz)? Also, is that sequence of 4K pulses + BLANK pulse running forever or do you need a certain amount of control over it (on/off/N-times)?
  • AribaAriba Posts: 2,690
    edited 2010-08-14 19:44
    You can use counter A in NCO mode to genarate the clock pulses, and counter B in POS-Edge/NEG-Edge mode to count this pulses.
    But you can't generate a puls per hardware when counter B reaches 4096, you just get the number of pulses in PHSB and must then do the puls with software.

    Andy
  • DXCDXC Posts: 33
    edited 2010-08-14 23:33
    Kuroneco,

    prop is at 80Mhz, and the sequence runs forever.

    Ariba,

    Is it no possible to do something like below:

    amount__1_______2_____.......4095____4096
    GSCLK: 1111000011110000......1111000011110000 <-5Mhz pulses

    BLANK: 0000000000000000......0000000000000110
  • kuronekokuroneko Posts: 3,623
    edited 2010-08-14 23:51
    DXC wrote: »
    amount__1_______2_____.......4095____4096
    GSCLK: 1111000011110000......1111000011110000 <-5Mhz pulses

    BLANK: 0000000000000000......0000000000000110

    That's certainly doable but requires a certain amount of s/w control. I'd stick with a counter for the 5MHz signal and a s/w loop which generates the BLANK pulse (which looks like a quarter of a GSCLK cycle which is 4 system clock cycles and can be easily achieved).

    Something like this should do:
    CON
      clock_pin = 0
      blank_pin = 1
      
    DAT             org     0
    
    setup           or      dira, clock_mask
                    or      dira, blank_mask
                    
                    movs    ctra, #clock_pin
                    movi    ctra, #%0_00100_000     ' NCO
                    movi    frqa, #%0001_00000      ' clkfreq/16
    
                    mov     cnt, cnt
                    add     cnt, prime              ' initial delay
                    
    loop            waitcnt cnt, delay
                    or      outa, blank_mask        ' |
                    andn    outa, blank_mask        ' | 4 cycle blank pulse
                    jmp     #loop                   ' every 4K * 16 cycles
    
    clock_mask      long    |< clock_pin
    blank_mask      long    |< blank_pin
    
    delay           long    16 * 4096
    prime           long    16 * 4095 + 9
    
                    fit
    
  • AribaAriba Posts: 2,690
    edited 2010-08-15 01:32
    DXC wrote: »
    Is it no possible to do something like below:

    amount__1_______2_____.......4095____4096
    GSCLK: 1111000011110000......1111000011110000 <-5Mhz pulses

    BLANK: 0000000000000000......0000000000000110

    If Blank also can have only 1 high cycle (...0000000000000100) then you can use the second counter in DUTY mode and set it to a frequency of 5MHz/4096. But this needs some synchronization at start of the counters so that the DUTY pulse comes in the right position. If you do it in Assembly this should be possible by writing the right PHSB value before start of CTRB.
    FRQB must be set to 2^32 / 16 / 4096.

    Andy
  • DXCDXC Posts: 33
    edited 2010-08-15 02:13
    I was thinking one counter for the pulses and another for the blank.
    Is it not possible to let de blank counter put "1" on an output pin when it reaches an certain amount of numbers.

    Counter one put on 5 Mhz in 4096 steps.
    Blank counter at 5Mhz in 16384 steps.
    Setting blank counter with a AND function so when Blank counter reaches 11 1111 1111 1110 AND 11 1111 1111 1111 the Pin on the blank will be high.

    Maybe 2 are not possible but only 11 1111 1111 1111 will also work.

    This way I can setup 1 COG for datashifting and handeling the grayscale clock.
  • AribaAriba Posts: 2,690
    edited 2010-08-15 10:20
    The Propeller counters can only output the MSBit of the counter register PHSx (=NCO mode) or the Carry when PHSx goes from $FFFFFFFF to $00000000 (=DUTY mode).

    According the datasheet of the TLC5940 the min. pulse length is 20ns for clear, so if you clock the Propeller with not more then 50MHz this should work:
    init
      ... 
      mov  frqa,gsclk_freq        'setup counters
      mov  ctra,gsclk_mode
      mov  frqb,clear_freq
      mov  ctrb,clear_mode        'ctrb start 8 clocks later
      ...
    
    gsclk_freq  long $2000_0000
    clear_freq  long $2000_0000 / 4096
    gsclk_mode  long %00110<<26 + gsclkPin
    clear_mode  long %00110<<26 + clearPin
    
    
    gsckl____-____-____-____-____-____
    clear_________________-___________
    
    with 40MHz clock pulses are 25ns
    
    Here are both counters in DUTY mode. Set the PLLx8 instead of PLLx16 so that the Propeller runs with 40MHz to try it.

    Andy
  • DXCDXC Posts: 33
    edited 2010-08-15 12:30
    Sounds very promising Ariba.
    Too bad I have to set de prop too a lower clock never the less I will look at it to understand it.

    gr,
  • kuronekokuroneko Posts: 3,623
    edited 2010-08-15 20:49
    @DXC: Since you insist on using counters (nothing wrong with that) here is some experimental (but tested) code which generates a 2 cycle BLANK pulse without s/w support. However, this assumes that you use at least 2 cogs in your project (we need to borrow a 3rd counter).

    Counter usage:
    • cog A: ctra for 5MHz pulse train
    • cog B: ctra/ctrb for 2 cycle DUTY pulse
    After that it's actually blindingly obvious (code only shows BLANK pulse generation).
    CON
      blank_pin = 16
      
    DAT             org     0
    
    experimental    or      dira, blank_mask        ' BLANK signal
    
                    movs    ctra, #blank_pin
                    movi    ctra, #%0_00110_000     ' DUTY
                    mov     ctrb, ctra              ' clone
    
                    movd    phsb, #%11_0000_000     ' preset
    
                    movd    frqa, #%01_0000_000     ' |
                    movd    frqb, #%01_0000_000     ' | clkfreq/64K
    
                    waitpne vscl, vscl              ' keep cog alive
    
    blank_mask      long    |< blank_pin
                    
                    fit
    
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