Shop OBEX P1 Docs P2 Docs Learn Events
Alternate Prop Chips — Parallax Forums

Alternate Prop Chips

HumanoidoHumanoido Posts: 5,770
edited 2010-12-15 15:32 in Propeller 1
I already have a two core tester (BS1 based) for developing simple parallel algorithms, to further development of multiple propeller machines.

http://forums.parallax.com/showthread.php?p=927796

Now I would like a larger "Prop tester" for Massively Parallel algorithmic behaviors - by building a new larger test machine using a huge insane number of VERY low cost alternate chips.

What is a good alternate chip that costs almost nothing and is easy to use?

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
humanoido
*Stamp SEED Supercomputer *Basic Stamp Supercomputer *TriCore Stamp Supercomputer
*Minuscule Stamp Supercomputer *Tiny Stamp Supercomputer *Penguin with 12 Brains
*BASIC Stamp Supercomputing Book *Three Dimensional Computer *StampOne News!
*Penguin Tech *Penguin Robot Society *Humanoid Toddler Robot
*Ultimate List Prop Languages *Prop-a-Lot *Propalot Stuff *Prop SC Computer
*Prop Skyscraper *Hobby Space Program
*Smart BoeBot - http://forums.parallax.com/forums/default.aspx?f=6&m=469004
*Multiprop Project List - http://forums.parallax.com/forums/default.aspx?f=25&m=472019
*Tiny Tester for Developing Parallel Algorithms - http://forums.parallax.com/forums/default.aspx?f=21&m=474649
«13

Comments

  • LeonLeon Posts: 7,620
    edited 2010-08-05 16:26
    Just simulate it on a PC. That's the usual way that sort of thing is designed to start with.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Leon Heller
    Amateur radio callsign: G1HSM
  • heaterheater Posts: 3,370
    edited 2010-08-05 16:46
    Yep. Just pretend that your 2GHz PC is a hundred 100Mhz chips or a thousand 10MHz chips. Save an awful lot of building/debugging time and money.

    Make life easy and program it in Java. Wrap each on of your parallel algorithms in a Java thread (runnable class). Cook up some communications links between threads. making all communication between processes go through those links. No direct sharing of memory between processes. Stop yourself cheating by making data used by a process private to it's class.

    Have some fun playing with different connection topologies and message routing.

    If you feel the need for more, network those links over to further PCs and run a few thousand more instances.

    Keep an eye on how much memory each instance takes up. In case you ever want too put the resulting algorithms onto real hardware.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    For me, the past is not over yet.
  • Capt. QuirkCapt. Quirk Posts: 872
    edited 2010-08-05 17:40
    Why not keep it in the family, I would like to see what you can do with this.·Because the great price·parallax is currently selling them for. Or a·multiple of·SX20 or SX48's chips on a single clock source.

    I believe,·Peter Verkaik or PJV·previously linked 48 to 50 SX's together for an industrial project. Peter also·released his·Dynamic Virtual Peripheral Library for SXB 2.0 and SX·Assembly.

    Not that you need the assistance, but I am·curious if you have a new way to apply them.

    Bill M.




    Post Edited (Capt. Quirk) : 8/5/2010 6:01:07 PM GMT
  • jmspaggijmspaggi Posts: 629
    edited 2010-08-05 18:11
    I will support Heater's recommandation and can also help with that as long as it's done in Java.

    Recent computers have 4 cores with 3GHz. Let's imagine how many prop that will emulate...

    JM

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Linux? There is worst, but it's more expensive.
  • Martin HodgeMartin Hodge Posts: 1,246
    edited 2010-08-05 18:41
    heater said...
    Make life easy and program it in Java.

    LOL! tongue.gif
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-05 19:14
    Great ideas.... All the fun (to me) is in building the real machine and interfacing it and actually programming it - not simulating it on a PC. It's like simulating a fine dinner on a PC, you just don't get the same satisfaction as the real thing.

    Considering the SX28 Proto Board board EOL at $5 each, it has some parts and a master library, but even that's not dirt cheap. What would be low cost enough? Maybe one chip should cost $1 or less? A one or more core chip will work fine. However, one core chips these days must go for a few pennies... [noparse]:)[/noparse] That's why it would be considered for a very low cost because many would be needed. Wasn't there a AVR project.. ATTiny or something that was used by Phil in a Parallax sound project? Did that CPU go down in price to a few pennies?

    Humanoido
  • heaterheater Posts: 3,370
    edited 2010-08-05 19:22
    jmspaggi: Actually I was not suggesting running Propeller emulations in this mega-threaded Java framework. Just experimenting with whatever parallel algorithms. When you have something interesting/useful then implement the algorithms to whatever language suits the target hardware best.

    Actually I might be tempted to make my ZPU emulation run multiple instances of the ZPU processor. Develop the algorithms in C/C++ and then they run on the Prop under ICC/Catalina/Zog straight away.

    Alternatively get set up with an Occam compiler for the PC which deals with all the threading/communication issues already. Then all we need is a version of the University of Kents Occam interpreter fro the Prop. They have one for AVR so it should be doable.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    For me, the past is not over yet.
  • LeonLeon Posts: 7,620
    edited 2010-08-05 19:39
    The cheapest device used to be the 50c ATtiny11 AVR, I was part of a group buy for them. Atmel discontinued it, though; probably because they found that they were losing money on it. I've still got a tube of them somewhere, a client of mine was using it in a product I designed.

    A small PIC is probably your best bet: the PIC12F508 is 41c in quantity.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Leon Heller
    Amateur radio callsign: G1HSM

    Post Edited (Leon) : 8/5/2010 8:18:20 PM GMT
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-05 19:41
    Speaking of AVR...

    (at SparkFun) Atmel's itty-bitty ATtiny13 8-Bit Processor. 1K of program space, 6 I/O lines, and 4-channel 10 bit ADC. Runs up to 20MHz with external crystal. Package can be programmed in circuit.

    http://www.sparkfun.com/commerce/product_info.php?products_id=211
    MCU 8-Bit ATtiny RISC 1KB Flash 3.3 Volt 5 Volt 8-Pin PDIP

    $1.94 price
    $1.75 10-99 (10% off)
    $1.55 100+ (20% off)

    Data Sheet
    http://www.atmel.com/products/AVR/

    This is getting closer to the requirement of $1 or less.

    Humanoido

    Post Edited (Humanoido) : 8/5/2010 7:48:50 PM GMT
  • jmspaggijmspaggi Posts: 629
    edited 2010-08-05 20:29
    Look at PIC10F200. You can find them at less thant 50¢ each... But I'm not sure you will be able to do a lot with them [noparse];)[/noparse]

    http://ww1.microchip.com/downloads/en/DeviceDoc/41239A.pdf

    JM

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Linux? There is worst, but it's more expensive.
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-08-06 00:52
    PIC10F2xx family and MC9RS08 family are cheap 6 & 8 pin micros. You are not going to do much with them though. MC9S08 family have some cheap 16 and 20 pin chips. All these are smt IIRC.

    But none of these are props of course. LOL

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Links to other interesting threads:

    · Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
    · Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
    · Prop Tools under Development or Completed (Index)
    · Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
    · Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
    My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz
  • tonyp12tonyp12 Posts: 1,951
    edited 2010-08-06 06:39
    TI430 2xx series
    http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=140&familyId=342 around $1 each.

    They also have cheaper G2 series, but it's only with 10 i/o at this time

    The 5xx series is the fastest, and some pins a grouped for 16bit acccess.
  • LeonLeon Posts: 7,620
    edited 2010-08-06 08:04
    FWIW, I've just received a couple of samples of the MSP430G2231. I got fed up waiting for my $4.30 demo board, so I thought I'd make my own. The 2201 is 47c for 1k pcs.
  • prof_brainoprof_braino Posts: 4,313
    edited 2010-08-06 09:58
    Leon wrote: »
    Just simulate it on a PC. That's the usual way that sort of thing is designed to start with.

    Leon Heller
    Amateur radio callsign: G1HSM

    A simulation in forth should be fairly straight forward using something like Pygmy forth on the PC. This is the type of thing I plan to do eventually, but I'm occupied with other parts of the project at the moment. Interested forthorers can PM me.
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-09 13:55
    I'm certainly interested in the Pygmy FORTH idea on the PC. But the web site states it's for DOS. Will that run correctly on XP?
  • LeonLeon Posts: 7,620
    edited 2010-08-09 14:04
    It will run in a DOS box on XP. I tried it a long time ago.
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-09 14:07
    BTW, in regards to pricing, I see numerous chips which are single core at $1 each. For use in a simple and low cost cluster machine, you may as well use an actual Propeller chip. The prop is $8 for 8 cores, which matches the $1 price tag of other single core chips.

    Moving the maximum price to $.25 or less, each, would be more reasonable. I would like to see a 100 core tester for $25 or less, 1/4th the cost of Propeller chips (on a core to core basis). Is it possible?

    Regarding the other chips, a lot of functioning is not needed, but just enough ops to demonstrate some clustered use. I actually thought about using some relays combination but these add up in cost quickly.

    Humanoido
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-08-09 19:17
    @humanoido: perhaps you could buy one of those cheap FPGA boards (with a lot of gates) and code a small cpu and replicate it many times. Just a thought.
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-10 00:45
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-08-10 06:52
    humanoido: Just put your project on hold for abour 2 years and I am sure you will be able to achieve your objective for under $25. This is the electronics industry after all. LOL
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-10 07:44
    Cluso99 wrote: »
    @humanoido: perhaps you could buy one of those cheap FPGA boards (with a lot of gates) and code a small cpu and replicate it many times. Just a thought.
    That's an absolutely great idea, as some FPGAs start from $59 and can have over a million gates - however it take lots and lots of time to totally design a new tiny computer, debug it, replicate it.. Perhaps someone knows of existing designs for very small computers, very minimal, and one could be used as a simple design. Probably someone will suggest the pic chip 16c57 inside the BASIC Stamp 1. :)

    Humanoido
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-10 07:48
    Cluso99 wrote: »
    humanoido: Just put your project on hold for abour 2 years and I am sure you will be able to achieve your objective for under $25. This is the electronics industry after all. LOL
    Cluso, this is correct, the project is 2 yrs ahead of its time, and so is your keen vision, however, if I could go into the future, I would not come back! :)

    Humanoido
  • LeonLeon Posts: 7,620
    edited 2010-08-10 07:49
    You need a large expensive FPGA for lots of processors, you'll only get a small number in the cheaper ones. Forget it and use simulation.
  • Heater.Heater. Posts: 21,230
    edited 2010-08-10 07:58
    Humanoido: "Perhaps someone knows of existing designs for very small computers, very minimal...."

    Strangely enough I do. The ZPU processor, as emulated on the Prop by Zog, is a 32 bit CPU design intended for use in FPGA's and to take up as few gates as possible. The idea is be able to have a processor managing your FPGA application logic without having to use an extra big FPGA to fit it in.

    Presumably one could fit many of these on an FPGA. In fact it did already occur to me that it would be a really funky idea to put say 8 ZPU cores into an FPGA with say some round robin logic to handle access to a common RAM area.

    Sound familiar?. Yes that's right. Instead of having Propeller COGs running Zog emulations of the ZPU why not just put 8 lots of ZPU logic in an FPGA?

    That's all a pipe dream as I don't imagine having the time to get that deeply into Verilog or VHDL.

    The ZPU design is open and available here http://opensource.zylin.com/zpu.htm

    For other CPU implementations on FPGA there is OpenCores http://opencores.org/ where you will find lots of other interesting stuff as well.
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-10 09:45
    Heater said, "Yes that's right. Instead of having Propeller COGs running Zog emulations of the ZPU why not just put 8 lots of ZPU logic in an FPGA?"

    That's really wild and profound. After the 8 are running, fill the FPGA to the max. How many will fit? 100? 1,000? 10,000? 100,000?

    Even more interesting, you won't need to build hardware from schematics, just software, as I understand it. What is the relationship between the number of gates per FPGA and the number of ZPUs that can fit?

    Humanoido
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-10 10:33
    After getting deeper into this project and seeing the value of single chips with a massive number of multiple cores (RISC computers), I wish Parallax would see this value too and at minimum, double the number of cogs in the next generation prop chip. But to be a serious contender, already chips are being released with 40 per chip and considerably above. If we're going to do a chip today, it will need to serve tomorrow, so a magnitude of 1000 is more reasonable. If the product came out today, a magnitude of 100 cores would be low end, as fast as this is changing. Migrating towards upward core mobility is absolutely the wave of the next generation computers and microcontrollers. The Propeller is a lot like 8 pic chips on a round robin electronics support substrate. I would like to see 8000 pics in a Prop chip if Parallax can step up to the plate. For now, I have a supercomputer project with 40 prop chips (x8=320 risc computers) and cannot begin to tell you the incredible moral support towards this project from gifted insightful people mindful of the importance. Skillful technicians with same interests may contact me in regards to a bonding company - with a goal to create a 1,000 to 10,000 cores chip. I can be contacted below.

    Humanoido
    penguin(dot)robot(at)yahoo(dot)com
  • Heater.Heater. Posts: 21,230
    edited 2010-08-10 10:37
    Humanoido: "That's really wild and profound"

    Yep it is. Thought you might like it.

    "How many will fit?"

    I really have no idea how to size that up. In the Zylin ZPU intro page they say a ZPU will take 442 LUTS. Well a LUT is a Look Up Table. That is the FPGA is actually performing logic functions OR, AND, XOR etc by using the inputs to address a table, then the table is filled with the correct logic function outputs.

    However if you check, for example the Altera FPGA family overview pages, they talk about how many LE's each FPGA has. LE as in Logic Element.

    How closely related LUTs and LEs are I don't know. In the old days they would speak of CLB's (Configurable Logic Blocks) so this is a jungle.

    Anyway. Lets say I go to my local electronics emporium and pick up an Altera Cyclone II Starter Kit for 180 Euros. (Which I've always been tempted to do by the way). That's got a Cyclone III EP3C25 device in it with 24624 LEs. If one LUT were equivalent to 1 LE that would be 55 ZPU's !!!

    When that's working we upgrade to a Cyclone IV EP4CGX150 with 1459760 LE's. That's 338 ZPU's!!!!

    BUT What is happening here? Lets say our numbers are overestimating by a factor of 2 due to the fact that we need other support logic besides the ZPU and the FPGA tools may not fit everything 100% efficiently. That's 25 odd ZPUs for 200 Euro. For 200 Euro we get 20 Propellers or 160 COGs to run ZPU's. And with the Prop we don't have to worry about how where or how the memory is interfaced.

    Looks like the economics is not working out. However those FPGA ZPU's will run a thousand times faster.

    Now for 200 Euro I can get a a board with a 4 core XMOS device each of which can run 8 independent threads at 50MIPS each (I think). That's the equivalent of 32 ZPUs.

    Ah this get's to complicated:

    XMOS - 200 Euro / 32 processors @ 50 MIPS each = 6 Euro/CPU
    Cyclone III FPGA - 200 Euro / 25 processors = 8 Euro/CPU
    Propeller - 200 Euro / 160 cogs = 1.25 Euro / CPU

    Unless you are only working in PASM in a COG the Prop processors will be 100 times slower than the Cyclon or XMOS solutions.

    The XMOS solution looks good here, just write your code and run it, no messing with Verilog or VHDL. Easy to expand when you want more processors. Cheaper too.

    You pay your money and you make your choice.

    Anyone here more knowledgeable about LUTs and LEs ?.
  • jazzedjazzed Posts: 11,803
    edited 2010-08-10 10:49
    Humanoido wrote: »
    ... however, if I could go into the future, I would not come back! :)
    I may not come back but I would certainly send my past self a future copy of the Wall Street Journal :)
  • HumanoidoHumanoido Posts: 5,770
    edited 2010-08-10 10:50
    Heater. wrote: »
    XMOS - 200 Euro / 32 processors @ 50 MIPS each = 6 Euro/CPU
    Cyclone III FPGA - 200 Euro / 25 processors = 8 Euro/CPU
    Propeller - 200 Euro / 160 cogs = 1.25 Euro / CPU
    Unless you are only working in PASM in a COG the Prop processors will be 100 times slower than the Cyclon or XMOS solutions. The XMOS solution looks good here, just write your code and run it, no messing with Verilog or VHDL. Easy to expand when you want more processors. Cheaper too.
    Heater: Thanks for doing the math and cost analysis. Very good ideas. The Verilog or VHDL route would be a timely diversion and good to eliminate it. The choice is XMOS? Really? Heater, are you telling me Leon was right about expounding the virtues of XMOS all this time? That's going to be ironic to a lot of Forum members. Ok, Leon, where are you? We need you on our team. :)

    Humanoido
  • LeonLeon Posts: 7,620
    edited 2010-08-10 11:50
    If you want to see a really powerful XMOS system, how about one of these:

    https://www.xmos.com/products/development-kits/xmp-64

    you get 64 XMOS four-core chips with 8x64 hardware threads delivering 25 GIPS for $1500.

    24 years ago I put 16 of my Inmos transputer modules, each with 1 Mbyte of RAM, on a large motherboard, delivering 320 MIPS. My distributor sold lots of them, at about £13,000 each!
Sign In or Register to comment.