A single processor running at 160 MIPs with interrupts would be more efficient than 8 20-MIP processors.· It would be especially nice if the single processor had the equivalent amount of memory of· the 8 cogs -- 16 KB.· With the virtual peripheral concept, most of the processing power is wasted in cogs that run serial ports or other low-compute functions.
However, there are several advantages to using multiple processors.· Power management, low latency and deterministic timing are just a few of them.
The patent office seems to grant a patent for anything these days and then someone has to fight at great expense to get it overturned. Surely an FPGA does the same thing as the MicroChip patent and they were around in the mid 80's. The prop does this also. Other simple single chip micros like the 68705 could be said to do this by being able to do a UART function in software (yes I did one) - only the power, reset and xtal pins were predefined.
I am sure the MicroChip patent will get overturned in time because it is really not new. It is just a specific application of a generally used·concept and as such cannot be patented. BTW I am not a patent lawyer.
They tried to patent the "AT" command concept but I think that failed because earlier interfaces had been doing this type of thing for years.
Long filenames is another point in question. Just because CPM used 8+3 it seems this was the standard and anything else was able to be patented. What about the different lengths used on minis and mainframes? The mini I worked on had 6+6 and dates back to 1969.
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It's not a cross-bar switch or anything like an FPGA, it's implemented using their own hardware technique with programmable registers. It's probably that which they have patented, rather than the overall concept.
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Leon Heller
Amateur radio callsign: G1HSM
I suspect the patent is probably quite narrow, and prevents others from implementing a code-comptible version of their chips.· Leon, do you know the title or number of the patent?
Heater, regarding interrupts said...
I'm flabbergasted. You have been here long enough to know better. How backwards can that statement be?
I wouldn't qualify my statement as backward but perhaps not well presented. The intent of this tread was to address what might entice non-prop design engineers to investigate/adopt the Prop on future designs. Many other MCUs use interrupts to free up CPU processing burdens (mitigated on the Propeller by multi-core processing capabilities) and cause an event driven implementation paradigm (ex. buffer is full triggers routine to handle data). I would suspect most of the non-Prop based design engineers out there are stuck in a rut regarding the need for event driven handling of interrupts and without supporting event handling they might pass over the Prop. Currently interrupt handling on the Prop is old school in that you have to dedicate code in one or more cogs to poll for an event or events, this directly places the interrupt handling implementation on the engineer. To mitigate this we could...
Have the complier support software interrupts....something like this (please ignore syntax and other issues this is just for illustration purposes)
Interrupt (priority1,TriggerSourceBitZset,@RAMDataAddress) <<< note source bit could be set by a DMA buffer full event or another cog write
{place code here}
The above already can be done but falls on the coder to directly address PASM line by line by line...while I enjoy this type of detail coding and the flexibility it offers, most engineers I have run into do not as they seek a more high level approach to handling simple tasks.
Edit>>> To implement this scheme in software would be cog-demanding as you would need a cog to act as a interrupt supervisor to keep track of interrupt events (buffer concurrent events) and all interrupts with the same priority would have to be grouped in the same Cog (I think?).
@RossH >> It is rare to see posts that have referenced quotes...Thank you for that.
I think Stephen Brosky's comments become more and more pertinent as the complexity of the interrupt implementation in a given system increases. Adding layers of priorities and concurrent interrupt handling causes delays, some of which I would suspect would be difficult to quantify, so deterministic is the exact opposite of what that scheme would be able to provide in such a case. However if the implementation is simple and concurrency of ISR handling by a single CPU is not a concern then the system is deterministic. This is where the Prop has real power as having multiple CPUs allows handling of multiple ISRs independently. My initial post was more aimed toward ease of software implementation rather than a complete architecture overhaul. The Prop might be able to skew their architecture some to assist with supporting ISRs such as DMA or ADC buffer full flags being set in hardware which ultimately triggers an ISR (could be software driven checks of the flag being set).
Post Edited (Miner_with_a_PIC) : 7/29/2010 5:56:13 PM GMT
It looks like a cross-bar switch to me.· I didn't see a reference to a patent, but I may have missed it.· I did a patent search at the U.S. Patent Office site, and I couldn't find it there either.· I did find 33 patents with Microchip Technology as the assignee, and containing the words peripheral, pin and select.· However, none of the patent titles refered to the peripheral pin select feature.
A single processor running at 160 MIPs with interrupts would be more efficient than 8 20-MIP processors.· It would be especially nice if the single processor had the equivalent amount of memory of· the 8 cogs -- 16 KB.· With the virtual peripheral concept, most of the processing power is wasted in cogs that run serial ports or other low-compute functions.
Yes, but...
This CPU can be run at 20KHz and ONE COG for 'sleep/idle' mode at a silly power consumption.
Then it can almost instantly kick it to 10MHz, or even 80MHz, or whatever you prefer in between, with anything from 1 to 8 COGs running.
COGs that are not running doesn't use power.
Very few MCUs that CAN give you the processing power of the Prop can also give you the low power mode of the Prop.
Imagine a battery operated weather logger, with a rain gauge, windspeed and direction, and air pressure.
It might wake up 4times/day, do the measurements, store the info on SD or transmit via GSM, then go back to sleep again. And how large a battery would it need to run for 3 months?
Or if it was equipped with a SMALL Solar cell?
It could also have a small camera to take photos of the sky, or anything else,·at the same time.
Or a modern dishwasher/washing machine/breadbaker. These all have some sort of controller, and don't really need the Prop, but with it, they can be substantially upgraded for very little extra cost; X-10 interfaces and other remote start/stop functionality, web-interface for control or status/diagnostics.
It's even easy to upgrade a system from 'standard' to 'enhanced'. Just make certain the new items have a SPI ROM· with the code for it. And a bit of code in the main unit that looks for and loads it into a COG, or dumps the original to load the new one..
Also, MCUs very seldom needs 20MIPS of processing power, let alone 100 or more.
What they more often need is fast response to an interrupt.
Heater;
The AVRs have a big advantage; with the access to more FAST RAM, they can do proportional fonts and pageturns much faster.
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Don't visit my new website...
heater said...
prof_braino: The Humane PC has three AVR chips in it, one is dedicated to video, one is dedicated to USB, one does the book reader thing.
Is it so that one Prop cannot replace that? At the price?
Perhaps so, but why not?
SPIN could be a factor. If you don't want to use SPIN, you have to either implement your own language, or build on one from humanoido's list which may or may not have issues.
Maybe it's not SPIN per se, but that the prop is (perceived as) 'bleeding edge' with regards to software (e.g. C support), and the (perceived) overhead of extra development is unacceptable to folks other than the type that are member to this forum.
If the prop is still in the 'early adopter' phase, there would need to be some event, like a famously successful application, to jump the gap to the 'general acceptance' phase.
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There are 10 types of people in the world: those who understand binary, and those who don't
heater said...
amazing projects.
The $20 wiki reader, Humane PC humaneinfo.com/pc.html and then this look like ideal candidates for using Propeller. So why don't they? Or could they?
the HIVE is a humane-pc similar implementation using prop
Heck with specs, How they have marketed the Propeller to distributors like Digi-Key is pitiful. Content in catalogs is supplied by manufactures. My first impression when I looked in Digi-Key's catalog is that they only sell Basic Stamps.
In comparison to a hobbyist, Digi-Key might not buy Smile from Parallax. But the catalog is like free advertising, so by intent or lack of effort, there is no soft sell, or specs to look at year after year.
It would have helped if they tried to provide more effective catalog print, and work towards changing the page number.
Actually ELFA changed their web site substantially some time this year which is where all the manufacture supplied info disappeared. Previously when you came to the Propeller page there was a better text and even the block diagram showing 8 COGs and the HUB RAM.
I suspect they still have a decent document in the pdf link but it's to late by then.
I've always found distributors to be a pain in the butt. They always want disproportional price cuts vs the amount of product they purchase. But there may be advantages when you compare the lifespan of a magazine vs a catalog, and the ability to display a more technical content during the catalogs lifespan. Many of us have old catalogs from some company laying around, and that print is a constant message until it's replaced.
In the case of Digi-Key, maybe they want to push Basic Stamps. In which case, Parallax should have been pushing the Spin Stamp since it is a direct replacement for the BS2 family and works in exsiting professional development boards.
Your audience will also be purchasing and receiving/inspection departments. Input/output state change timing diagrams and specifications, typical/minimum/maximum voltage/current specifications, test circuit diagrams and environmental (temperature/humidity/altitude) to verify all specifications. Some companies will require reliability specifications (for example, mean time between failure).
Comments
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Leon Heller
Amateur radio callsign: G1HSM
However, there are several advantages to using multiple processors.· Power management, low latency and deterministic timing are just a few of them.
Dave
I am sure the MicroChip patent will get overturned in time because it is really not new. It is just a specific application of a generally used·concept and as such cannot be patented. BTW I am not a patent lawyer.
They tried to patent the "AT" command concept but I think that failed because earlier interfaces had been doing this type of thing for years.
Long filenames is another point in question. Just because CPM used 8+3 it seems this was the standard and anything else was able to be patented. What about the different lengths used on minis and mainframes? The mini I worked on had 6+6 and dates back to 1969.
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Links to other interesting threads:
· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
· Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz
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Leon Heller
Amateur radio callsign: G1HSM
Post Edited (Leon) : 7/29/2010 2:06:24 PM GMT
I wouldn't qualify my statement as backward but perhaps not well presented. The intent of this tread was to address what might entice non-prop design engineers to investigate/adopt the Prop on future designs. Many other MCUs use interrupts to free up CPU processing burdens (mitigated on the Propeller by multi-core processing capabilities) and cause an event driven implementation paradigm (ex. buffer is full triggers routine to handle data). I would suspect most of the non-Prop based design engineers out there are stuck in a rut regarding the need for event driven handling of interrupts and without supporting event handling they might pass over the Prop. Currently interrupt handling on the Prop is old school in that you have to dedicate code in one or more cogs to poll for an event or events, this directly places the interrupt handling implementation on the engineer. To mitigate this we could...
Have the complier support software interrupts....something like this (please ignore syntax and other issues this is just for illustration purposes)
Interrupt (priority3,TriggerSourcePin3HLTransition,@RAMDataAddress)
{place code here}
Interrupt (priority1,TriggerSourceBitZset,@RAMDataAddress) <<< note source bit could be set by a DMA buffer full event or another cog write
{place code here}
The above already can be done but falls on the coder to directly address PASM line by line by line...while I enjoy this type of detail coding and the flexibility it offers, most engineers I have run into do not as they seek a more high level approach to handling simple tasks.
Edit>>> To implement this scheme in software would be cog-demanding as you would need a cog to act as a interrupt supervisor to keep track of interrupt events (buffer concurrent events) and all interrupts with the same priority would have to be grouped in the same Cog (I think?).
@RossH >> It is rare to see posts that have referenced quotes...Thank you for that.
I think Stephen Brosky's comments become more and more pertinent as the complexity of the interrupt implementation in a given system increases. Adding layers of priorities and concurrent interrupt handling causes delays, some of which I would suspect would be difficult to quantify, so deterministic is the exact opposite of what that scheme would be able to provide in such a case. However if the implementation is simple and concurrency of ISR handling by a single CPU is not a concern then the system is deterministic. This is where the Prop has real power as having multiple CPUs allows handling of multiple ISRs independently. My initial post was more aimed toward ease of software implementation rather than a complete architecture overhaul. The Prop might be able to skew their architecture some to assist with supporting ISRs such as DMA or ADC buffer full flags being set in hardware which ultimately triggers an ISR (could be software driven checks of the flag being set).
Post Edited (Miner_with_a_PIC) : 7/29/2010 5:56:13 PM GMT
There is a problem with the Microchip web site and I can't access the page with PPS details. It's referenced here:
www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=2629¶m=en530887
You might have better luck.
Here is the relevant section from the Ref. Manual:
ww1.microchip.com/downloads/en/DeviceDoc/39711b.pdf
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Leon Heller
Amateur radio callsign: G1HSM
Post Edited (Leon) : 7/29/2010 6:09:04 PM GMT
The $20 wiki reader, Humane PC humaneinfo.com/pc.html and then this
and
The $10 TV-computer playpower.org/
Both look like ideal candidates for using Propeller. So why don't they? Or could they?
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For me, the past is not over yet.
It looks like a cross-bar switch to me.· I didn't see a reference to a patent, but I may have missed it.· I did a patent search at the U.S. Patent Office site, and I couldn't find it there either.· I did find 33 patents with Microchip Technology as the assignee, and containing the words peripheral, pin and select.· However, none of the patent titles refered to the peripheral pin select feature.
Dave
I'm working on something similar to these (much more powerful, of course), but because of the cost of the prop, they will not be as cheap.
'Why don't they' is related to the cost and familiarity of the microprocessor?
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There are 10 types of people in the world: those who understand binary, and those who don't
Is it so that one Prop cannot replace that? At the price?
Perhaps so, but why not?
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For me, the past is not over yet.
This CPU can be run at 20KHz and ONE COG for 'sleep/idle' mode at a silly power consumption.
Then it can almost instantly kick it to 10MHz, or even 80MHz, or whatever you prefer in between, with anything from 1 to 8 COGs running.
COGs that are not running doesn't use power.
Very few MCUs that CAN give you the processing power of the Prop can also give you the low power mode of the Prop.
Imagine a battery operated weather logger, with a rain gauge, windspeed and direction, and air pressure.
It might wake up 4times/day, do the measurements, store the info on SD or transmit via GSM, then go back to sleep again. And how large a battery would it need to run for 3 months?
Or if it was equipped with a SMALL Solar cell?
It could also have a small camera to take photos of the sky, or anything else,·at the same time.
Or a modern dishwasher/washing machine/breadbaker. These all have some sort of controller, and don't really need the Prop, but with it, they can be substantially upgraded for very little extra cost; X-10 interfaces and other remote start/stop functionality, web-interface for control or status/diagnostics.
It's even easy to upgrade a system from 'standard' to 'enhanced'. Just make certain the new items have a SPI ROM· with the code for it. And a bit of code in the main unit that looks for and loads it into a COG, or dumps the original to load the new one..
Also, MCUs very seldom needs 20MIPS of processing power, let alone 100 or more.
What they more often need is fast response to an interrupt.
Heater;
The AVRs have a big advantage; with the access to more FAST RAM, they can do proportional fonts and pageturns much faster.
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Don't visit my new website...
Yes, but... My second paragraph basically said what you said, but in two sentences.
Dave
SPIN could be a factor. If you don't want to use SPIN, you have to either implement your own language, or build on one from humanoido's list which may or may not have issues.
Maybe it's not SPIN per se, but that the prop is (perceived as) 'bleeding edge' with regards to software (e.g. C support), and the (perceived) overhead of extra development is unacceptable to folks other than the type that are member to this forum.
If the prop is still in the 'early adopter' phase, there would need to be some event, like a famously successful application, to jump the gap to the 'general acceptance' phase.
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There are 10 types of people in the world: those who understand binary, and those who don't
the HIVE is a humane-pc similar implementation using prop
hive-project.de/
Uses Three props, A-user B-Graphics C-I/O(SD, Ethernet, etc)
translate.google.com/ Google translate works passably if you don't understand German
translate.googleusercontent.com/translate_c?hl=en&ie=UTF-8&sl=de&tl=en&u=http://hive-project.de/&prev=_t&rurl=translate.google.com&twu=1&usg=ALkJrhgW2ktyNMTtGgTFdWxthrSiuoAoFA
(I Think) it uses spin for OS and FemtoBasic for user programs. 75 euros with ethernet option.
The kits are all gone, but he's sending me a bare board. I'll post an update when the soldering iron burns have healed enough to type again.
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Even the best needles are not sharp at both ends.
Post Edited (prof_braino) : 7/31/2010 2:48:52 PM GMT
In comparison to a hobbyist, Digi-Key might not buy Smile from Parallax. But the catalog is like free advertising, so by intent or lack of effort, there is no soft sell, or specs to look at year after year.
It would have helped if they tried to provide more effective catalog print, and work towards changing the page number.
(or maybe it's the 5 year plan)
Here is Scandinavia we have a distributor call ELFA. When you find the Prop in their web shop or hard copy catalog it is described as:
"Microcontroller 8 Bit"
Zooming in for more info we see:
"Bus width 8 Bit"
I suspect they don't sell very many:(
https://www.elfa.se/elfa3~eu_en/elfa/init.do?shop=ELFA_EU-EN#toc=20968;
USUALLY they just insert whatever the manufacturer told them...
(and no, they're not the only ones)
So why have they written their own text for it?
I do 'a bit' of shopping at Elfa, and have learned to never take anything at face value.
(And yes, I've bought Parallax kit from them.)
http://uk.farnell.com/jsp/search/browse.jsp?N=500006+1004406+5384019&Ntk=gensearch_001&Ntt=parallax&Ntx=mode+matchallpartial&No=0&getResults=true&appliedparametrics=true&locale=en_UK&catalogId=&prevNValues=500006+1004406&filtersHidden=false&appliedHidden=false&originalQueryURL=%2Fjsp%2Fsearch%2Fbrowse.jsp%3FN%3D500006%2B1004406%26Ntk%3Dgensearch_001%26Ntt%3Dparallax%26Ntx%3Dmode%2Bmatchallpartial%26No%3D0%26getResults%3Dtrue%26appliedparametrics%3Dtrue%26locale%3Den_UK%26catalogId%3D%26prevNValues%3D500006%2B1004406
They have got the descriptions about right, apart from not mentioning that they have eight cores.
They don't sell many of them, though, probably because of the price.
Actually ELFA changed their web site substantially some time this year which is where all the manufacture supplied info disappeared. Previously when you came to the Propeller page there was a better text and even the block diagram showing 8 COGs and the HUB RAM.
I suspect they still have a decent document in the pdf link but it's to late by then.
In the case of Digi-Key, maybe they want to push Basic Stamps. In which case, Parallax should have been pushing the Spin Stamp since it is a direct replacement for the BS2 family and works in exsiting professional development boards.
Bill M.