Any interest in one COG chip

richaj45

I was thinking that in many cases i just need a small chip to do the job.
That is 18 pins or so.
Would it be nice if you could get a 18-pin dip chip that just had one COG, no video and build in flash that would boot to the COG on
reset?

I think it would any one else agree?

rich

RossH

Hi Rich,

Lots of interest, obviously - but it's called an AVR.

Ross.

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HollyMinkowski

An AVR with no interrupts.

If you only have a single processor...ya just gotta have interrupts!
(or simulate them...what a pain that is)

Now a 2 or 3 cog prop for 2.00 or less...superb!
I'd use them instead of something like a tiny88.

Cluso99

I would much rather a 64 I/O version with 16 cogs at $16. Anyway, it's not going to happen.

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Links to other interesting threads:

· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
· Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz

Ale

A 1 COG "prop" can you make not that easily(tm) using a FPGA [noparse]:)[/noparse] Of course an AVR maybe the way to go... or an XMega... there are many options. I agree with cluso, the 64 IOs Propeller _is_ a much useful idea [noparse]:)[/noparse]

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Sapieha

Hi all.

I'm sorry to mention it.

BUT one that mention 1 COG's propeller don't understand principles of NOT have interrupts ON chip.
And parallel processing principles.


SORRY for THAT to all.

Regards

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Sapieha

heater

A one Cog Prop would be very sad.

20MIP of performance but only if you have all your code in the 496 instruction COG space.
So all that RAM is only usable for data.
What data might that be? With no peripherals it's hard to get data in or out.

If using Spin you just have a really slow micro, with no peripherals.

Things might be salvageable using LMM code, at least you get to use the RAM.
But then you still have just a micro-controller that is slow and limited compared to the above mentioned AVRs and PICs.

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For me, the past is not over yet.

Bill Henning

Personally, in order of priority, I'd like to see:

Prop1.5 - current prop with 64 I/O
Prop2.0 - Chip's next baby
Prop0.5 - think current prop, 4 cogs, 16KB hub, 28 pin skinny dip (Vcc,Vss,/RST,/BOE,OSC1,OSC2, P0-P21) for $1 in high quantity (4 cogs + 16K hub so smaller die)

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Dave Hein

This was mentioned in the SX forum when the SX EOL was announced.· Personally, I would like to see a smaller version of the Propeller made available.· Many applications (Most applications?) do not require 8 cogs.· A single-cog version may be useful, but it may be best to have at least 2 cogs.· I think a 4 cog version would be really nice!

Edit: I was posting at the same time as Bill.· So that's two votes for a 28-pin 4-cog version.

Post Edited (Dave Hein) : 6/24/2010 1:21:45 PM GMT

Unknown

If they wanted to do a one or two cog chip with·one large hub memory then there might be some possibilities there.· You could call it a dual engine prop.

RiJoRi

HollyMinkowski said...
... If you only have a single processor...ya just gotta have interrupts! ...

Well, you don't always need interrupts. The engineer at my first Elec.Tech. job seemed to be interrupt-o-phobic, yet we managed to build many vending machines without using interrupts. We used the 8085 running at 3.579MHz, and a polling scheme. Our opus magnus was a token-vending machine for the NYC Transit Authority, which accepted coins and bills, and spewed out tokens and change. The only user interface was a 4-digit LED display, and some lamps lighting status messages. (incidentally, we found that the customers ignored the "Out of Service" message, and got quite irritated when they could not use a non-functioning machine!)

Oh, and if I remember my history, the first General Instrument PICs did not have interrupts, either.

--Rich

Sal Ammoniac

Sure. If it costs $0.50 or less then I'm all for it. Otherwise there are plenty of AVR or PIC choices in that price range and ARM Cortex-M0 chips are around a buck.

Miner_with_a_PIC

Make that three votes for a 4 cog version of the propeller with 16KB of RAM (i.e. split the die in two with some rerouting of the metalization here and there)...however keeping the 32 I/O count might be wise. Most all of my programs do not exceed 4 cogs and 16KB is workable for most projects. I suspect there would be a slight reduction in cost for this pedigree...perhaps a 5 dollar price tag and I wonder whether from a business standpoint if this SKU would be viable for Parallax to support...probably not as there would be the added cost of a new line (new mask sets etc.) which might be difficult to recoup.

A one cog version doesn't make too much sense as the Propellers main strength is its ability to parallel process various tasks rather than use interrupts. As many have mentioned in this thread if a single cog is what is desired it might be best to use any one of the many PICs already on the market.

BEEP

Yes, it would be nice to have a cheaper/smaller version of Propeller to replace the AVR in my projects.

Toby Seckshund

The thing that attracted me to the Prop path was that there was only one varient, with one (official) compiler. I was disapointed that the project that I was looking at was on a AtTiny this or a AtMega that, using XXX compiler. Always it was just the combination I didn't have.

But I will vote for the Prop 1.5. One day after I win the lottery, I will fund the building of a Prop 1.5 in a PLCC84.

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Why did I think a new, more challenging, job was a good idea ??

Toby Seckshund

I notice that Linus has gone back to the ATMega88 for his 2010 entrance.

How I wish I could have become the owner of Props or AVRs back 30 years ago, Hey-Ho.

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Why did I think a new, more challenging, job was a good idea ??

John Abshier

Personally, in order of priority, I'd like to see:

Prop1.5 - current prop with 64 I/O
Prop0.5 - think current prop, 4 cogs, 16KB hub, 28 pin skinny dip (Vcc,Vss,/RST,/BOE,OSC1,OSC2, P0-P21) for $1 in high quantity (4 cogs + 16K hub so smaller die)
Prop2.0 - Chip's next baby

John Abshier
2/3 of the way to UPEW

Cluso99

Since it has been brought up, my preference is..

Prop 1.5 - current prop with 64 I/O
Prop 2.0 - Chip's next baby

Note I do not see a lower spec version. The reason is that it will be too hard for Parallax to compete in this already saturated market. They could not justify the die cost. The current cost is just a factor of volume. If we could up the volume of the current prop significantly then the price would come down.

And just forget a 1 cog version... No peripherals and no interrupts.

Whether they could fit the existing prop into a smaller 28pin package I am unsure, but it would not reduce the price without serious volume. I think it may be better to fit the QFN onto a carrier pcb, but of course this only increases the cost. Maybe I could ask, why do you want a 28 skinny dip? For price or for size???

Just remember, to compete in a well established volume market, you require a differentiated product. That is what the Prop is... a different product!!!

Toby said "How I wish I could have become the owner of Props or AVRs back 30 years ago, Hey-Ho." - Me too!

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Links to other interesting threads:

· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
· Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz

BigFoot

Personally the order I would like to see is

Prop 1.5 - 256K Ram

We spend all of our time trying to fit our programs in the prop's tiny ram.

Russ

Ravenkallen

I say...

Propeller 2.0 then the Propeller 1.5

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Cluso99

BigFoot: The Prop 1.5 has been designed so it is only a matter of producing silicon. Redesigning it to include 256K SRAM would most likely take longer than it would to get Prop 2.0 out. It would also require finer geometries which would lose some of the Prop I appeal, such as low power.

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Links to other interesting threads:

· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
· Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz

Jack Scarlet

I would like to see an 8 cog prop in 10 and 12 pin packages.

jmg

richaj45 wrote: »

I was thinking that in many cases i just need a small chip to do the job.
That is 18 pins or so.
Would it be nice if you could get a 18-pin dip chip that just had one COG, no video and build in flash that would boot to the COG on reset?

Built-in flash, is quite a large jump in business model, and a single COG is under 500 opcodes.
There are 10/16/20 pin uC with 8-16k FLASH already out there, so that is a LOT more code space, and they have interrupts, and start at ~ 25c - with 12b ADCs.

Once Prop 2 hits critical commercial mass, then small variants could perhaps find the resource, but the Prop 1 was hand-taped, whilst the Prop 2 is core-synthesized - so a big decision becomes to shrink Prop 2, but include the time-slice thread design, or trim and paste Prop 1.

Another approach is to do what the other uC vendors do, and offer one die as more than one part.
That catches any yield fall out, and cuts testing times, so a labeled-smaller part can be cheaper.

One limit here, is the Prop 1 die, is already maxed-out in the square packages it is offered in, so smaller skinny-dip packages, need a much smaller die.

jmg

Jack Scarlet wrote: »

I would like to see an 8 cog prop in 10 and 12 pin packages.

Sure, if the pins are on 5mm centres

I've seen 8K Micros with 12 bit ADCs in MSOP10, but the Prop 1 die is way too large to come anywhere near a 3mm package.

Heater.

Yeah,

I want a single COG chip.

Mind you I want that cog to be 64 bits wide and support some megabytes of COG registers.
The HUB memory would actually be external SD RAM.
Given the P2 COGs now support automatic thread scheduling we can still run huge LMM code from HUB, and multiple internal COG code threads at the same time.
No interrupts required.

LoopyByteloose

Fxc2hh wrote: »

If they wanted to do a one or two cog chip with·one large hub memory then there might be some possibilities there.· You could call it a dual engine prop.

It is a bit interesting about how less Cogs would work with reading Hub Memory
4 Cogs... twice as fast as 8
2 Cogs... four fold faster than 8

I really can't see the point in ONE Cog.. someone else can do a nice little 32bit processor.. and already has. No reason for SPIN with ONE Cog.. though PASM might really remain useful.

localroger

If the P8X32B (P1 + 64 IO) (edit: or is that # P2?) has actually been designed then yeah, I would really like to see it made into silicon. There are significant advantages to the P1's 360nm process for low power applications and implementation simplicity. I wonder if there's a way Parallax could do something like the next P2 run with less expensive fab but more expensive chips just to make it a thing for seeing what we could do with it?

More RAM in P1 isn't going to happen. It would bork compatibility with all sorts of things and require a whole lot of new layout with tools Chip and Beau have moved past while working on P2. With more pins you don't need mor Hub RAM because you can use the pins to get to external RAM and still have pins for I/O.

I also don't think the business case is there for Parallax to do a 4-cog chip. It wouldn't be that much cheaper, and would be much more crippled. That's the kind of thing you make if you're supplying large-scale manufacturers who use exponential notation in their order quantities, but there's no sense for Parallax to dump the cash into layout and tooling for a chip they'd probably still have to sell for $3+ after paying back the tooling costs to compete against <$1 AVR's.

average joe

I keep praying for the day the P8X32B is released. Those extra 32 pins would be worth more than their weight in silicon. Don't mess with the number of cogs, or memory size. This is just unnecessary (and asking for trouble) IMO . I have half a dozen projects that a 64 pin prop would benefit from. I'd love to jump on the P2 bandwagon, but a DE2-115 is beyond my price point right now and a DE0-Nano it a bit short on spec. I keep waiting for actual silicon, but very few of my current projects need the actual processing power. Maybe by xmas...

jmg

localroger wrote: »

I also don't think the business case is there for Parallax to do a 4-cog chip. It wouldn't be that much cheaper, and would be much more crippled. That's the kind of thing you make if you're supplying large-scale manufacturers who use exponential notation in their order quantities, but there's no sense for Parallax to dump the cash into layout and tooling for a chip they'd probably still have to sell for $3+ after paying back the tooling costs to compete against <$1 AVR's.

Not as a full custom design, but many vendors take one set of wafers and create multiple labels.

Just checking Microchip, it looks like they vary the price in a ratio ~1:1.75 by doing this.

Same silicon, less testing time, and usually some sub-set like less code or fewer pins.

However, the relatively large die of the Prop 1 somewhat limits the package choices.

Another same-wafer choice, is to bond Loader Flash into the same package.

kwinn

I wouldn't mind seeing a lower cost prop1 with fewer (even just 1) cogs. I generally run out of I/O pins or memory before I run out of cogs. I wonder if there are chips where one or more cogs are defective but everything else works. They would be good candidates for a propeller with fewer cogs.

LoopyByteloose

localroger wrote: »

If the P8X32B (P1 + 64 IO) (edit: or is that # P2?) has actually been designed then yeah, I would really like to see it made into silicon. There are significant advantages to the P1's 360nm process for low power applications and implementation simplicity. I wonder if there's a way Parallax could do something like the next P2 run with less expensive fab but more expensive chips just to make it a thing for seeing what we could do with it?

More RAM in P1 isn't going to happen. It would bork compatibility with all sorts of things and require a whole lot of new layout with tools Chip and Beau have moved past while working on P2. With more pins you don't need mor Hub RAM because you can use the pins to get to external RAM and still have pins for I/O.

I also don't think the business case is there for Parallax to do a 4-cog chip. It wouldn't be that much cheaper, and would be much more crippled. That's the kind of thing you make if you're supplying large-scale manufacturers who use exponential notation in their order quantities, but there's no sense for Parallax to dump the cash into layout and tooling for a chip they'd probably still have to sell for $3+ after paying back the tooling costs to compete against <$1 AVR's.

More RAM in a P1? Could the 32K ROM space for logs and trig function and characters be done away with and just leave 512 Longs for the Boot Cog image?