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FPGA soft-prop now runs PropBasic programs — Parallax Forums

FPGA soft-prop now runs PropBasic programs

nutsonnutson Posts: 242
edited 2010-05-02 11:43 in Propeller 1
More than a year ago I showed this·forum a working·FPGA·soft-CPU that could execute a subset of·propeller ASM. I lost interest·in the project, one reason being the lack of a road to a higher level language. However, when Bean recently released PropBasic,·running this language on the soft-cog became·feasible. So I dusted off my·Logic analyser, and·now can show·a working·soft-mini-propeller·with 3 CPU's that can run PropBasic programs (with some post-editing, see example and screenshot). Some more details are in the .PPT (please rename the file after download). Thanks Bean & co for this excellent tool.

Nico Hattink

Comments

  • pullmollpullmoll Posts: 817
    edited 2010-05-01 20:07
    A new aspect of emulation: emulating the Propeller.
    This is very interesting! I guess you had your fun running the first PropBasic apps smile.gif

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    Pullmoll's Propeller Projects
  • BeanBean Posts: 8,129
    edited 2010-05-01 20:14
    nutson,
    ··A very interesting project.

    · Do you think you will be able to emulate the entire propeller instruction set ?

    · It might be possible to support your soft-cpu directly in PropBasic (basically a different device type). Then propbasic would only generate instructions that your device supports.

    Bean.

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    Use BASIC on the Propeller with the speed of assembly language.
    PropBASIC thread http://forums.parallax.com/showthread.php?p=867134

    March 2010 Nuts and Volts article·http://www.parallax.com/Portals/0/Downloads/docs/cols/nv/prop/col/nvp5.pdf
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    There are two rules in life:
    · 1) Never divulge all information
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    If you choose not to decide, you still have made a choice. [noparse][[/noparse]RUSH - Freewill]

    Post Edited (Bean) : 6/3/2010 5:01:17 PM GMT
  • BaggersBaggers Posts: 3,019
    edited 2010-05-01 20:22
    Congrats nutson, how fast is it running? and would it slow using more cogs?

    Interesting project, what are you planning to do with it?

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    Post Edited (Baggers) : 5/1/2010 8:27:38 PM GMT
  • nutsonnutson Posts: 242
    edited 2010-05-01 20:44
    @ pullmoll: Let's call it "rewarding" when a design starts working. This technique is very powerfull: Parallax (Chip Gracey) has developped the propeller in an FPGA first, before going to silicon, and is now·working on the propII the same way afaik.

    @Bean: emulating a full propeller is a·(very) far away goal. Three steps would be necessary:
    1 expand the instructionset with the remaining aritmetic instructions, I am only halfway (CMPS, CMPSX etc) Problem is that·Verilog does not support signed·arithmetic, and·correctly setting the C-flag in all instructions could be·a lot of coding. But a better programmer than me might find this solvable. On the other hand, I can add instructions like·MUL·easily.
    2 the instructions like·COGINIT, the LOCKS·etc I have not planned. Currently COG programs·are loaded static from the external·propeller before starting the system (so not from the internal FPGA-HUB)
    3·I have not planned the counter hardware, and something else for the video hardware.

    But maybe there are propeller lovers that desperately want 16 COG's,·64 free pins and 512K32 hub memory, please join the project....

    ·
  • LeonLeon Posts: 7,620
    edited 2010-05-01 21:16
    This Xilinx app note might be useful:

    www.xilinx.com/support/documentation/application_notes/xapp215.pdf

    You could use VHDL, which does support signed arithmetic. smile.gif

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    Leon Heller
    Amateur radio callsign: G1HSM
  • nutsonnutson Posts: 242
    edited 2010-05-01 21:17
    @Baggers: Each CPU 150 MHz : 3 (clocks) = 50M instructions / second. Three CPU's 3 x 50 = 150 MIPS total.
    The number of·CPU's is a limited by the FPGA on-chip memory (on the DE-1 board that is 26 K)·. My current design can be made to handle·7 CPU's without slowing down·hub access. So I could build·a system with 7 CPU's (7 x 2K) + 12 K Hub memory giving 7 x 50 = 350 MIPS total.·More than 7 CPU's is possible but will slow down hub access. Using the SRAM memory 256K16 on the DE-1 board·as hub memory (and not as SVGA memory) is also possible but much slower as the on-chip memory. The use? Don't really know yet, I have been dreaming·of building a "reconfigurable" CPU for many years. Having worked·in the·test and measurement industry, applications like·fast digital oscilloscopes·interest me.

    ··
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-05-02 02:07
    Congratulations Nutson. Nice to see you dusted the project off and have continued.

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    Links to other interesting threads:

    · Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
    · Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
    · Prop Tools under Development or Completed (Index)
    · Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
    · Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
    My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-05-02 11:43
    "16 COG's,·64 free pins and 512K32 hub memory"

    Hmmm...

    Do you realize just how many project notes and keyboards have just been ruined?
    Instant salivation, across the face of the planet!

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