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3D texture mapping on Prop II - Page 2 — Parallax Forums

3D texture mapping on Prop II

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  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2010-04-21 04:22
    markaeric said...
    I believe he's still working off of a 1,000+ pin Altera FPGA.



    Oh My, that sounds complicated smile.gif

    I wonder if it can emulate the prop2 at anything
    approaching what it's native speed would be?
  • potatoheadpotatohead Posts: 10,261
    edited 2010-04-21 05:27
    Chip said: "conchunkulate"

    I'm adding that to my lexicon right now. [noparse]:)[/noparse]

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  • jmgjmg Posts: 15,173
    edited 2010-04-21 06:02
    JRetSapDoog said...

    But couldn't you throw your weight around and beg Chip to bump the chip up to a total of 1MB of built in RAM, despite the costs?

    I mean, with one megabyte of RAM, let's see...we could do WQVGA (as wide screens are becoming the standard) at 400x240 ...


    Yes, RAM size is going to be critical, but there may be other way to crack the Memory conundrum ?.

    I see the new 200MHz Rabbit6000, has 1MB of on chip RAM, and they went to DRAM to keep die size down.
    They do 32KB of battery backed SRAM.
    That looked like quite a smart trade-off.

    There is also SDR SDRAM, which could be supported with a relatively simple SDRAM interface ?
  • jmgjmg Posts: 15,173
    edited 2010-04-21 06:08
    Chip Gracey (Parallax) said...

    The software that did this for each visible scan line was just:
            mov     pairs,#256           'ready for 512 pixels
    :loop   mov     pixels,h7FFF7FFF     'set two 5:5:5 background pixels to WHITE
            pixf    pixels               'alpha blend next texel into low-word pixel
            pixf    pixels               'alpha blend next texel into high-word pixel
            waitvid scale,pixels         'output two pixels
            djnz    pairs,#:loop         'loop until 512 pixels output
    
    




    Any chance of a more complete ASM / opode dump ?
    (since you have an assembler working... just drop any asm tester listing file will do )

    Post Edited (jmg) : 4/21/2010 6:14:52 AM GMT
  • potatoheadpotatohead Posts: 10,261
    edited 2010-04-21 06:14
    @Bill -->Looks to me, like we've got a 512 pixel / scan line display loop there. Think about that, in terms of a Prop I waitvid loop, and I think your spec you posed on this thread is no problem [noparse]:)[/noparse]

    Good times ahead!

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  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2010-04-21 06:45
    He must be working with a dev board like this Taiwanese
    Stratix III board
    DE3_Layout_500.jpg


    That earlier youtube video was great.
    Must be able to simulate at a good speed
    as it seemed fast and smooth.
    (video posted by nh3cl ??? Ammonium Chloride? ...must be a chemical engineer) smile.gif


    Altera DE3 Development System
    (Currency: USD)
    Price: $2,695

    Holy @#$&!

    Maybe they would take an old stk500 in trade wink.gif

    Oboy! you can stack up to ten of these for more cowbell!
    (Just take out a 2nd mortgage)
    01_285.jpg

    Post Edited (HollyMinkowski) : 4/21/2010 7:08:18 AM GMT
  • AleAle Posts: 2,363
    edited 2010-04-21 07:08
    Ammonium chloride is actually NH4Cl.

    They have some silicon as far as I remember...

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  • HollyMinkowskiHollyMinkowski Posts: 1,398
    edited 2010-04-21 07:29
    It looked familiar...but yup, nh3cl is chloramine...
    I think it would be dangerous...something like the fumes you
    might get if you mixed up bleach and other cleaning stuff.

    Maybe it's a ham call..not a chem name smile.gif
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-04-21 08:27
    Wow, that is so smooth Chip.

    Holly, it would be something like that Stratix III pcb but no doubt comes from Altera.

    Wouldn't just love to get your hands on that PropII Stratix code so we could build our own PropII's smilewinkgrin.gif

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  • JRetSapDoogJRetSapDoog Posts: 954
    edited 2010-04-21 13:13
    "Build our own Prop IIs"? Uh-oh! Make a note to hire (more) security guards for UPEW (or take the dev. system home before). Gee, Apple already lost or "lost" a next-gen iPhone recently.

    Thanks for the comment on the size of SRAM, Cluso. Yeah, I was thinking that getting to 1MB would, in the worst case, quadruple the die size, but hopefully only triple or double it, particularly if the current design has 384KB instead of 256KB. Anyway, all those transistors might have quite an appetitie for power, and don't know if there would be a way to power-down unused sections.

    What's that? Dateline Monday, August 2nd, 2010: Parallax announces three--not just one--versions of the Prop ][noparse][[/noparse]. Today, in a surprise announcement, Parallax's Ken (last name withheld) said that the new Prop ][noparse][[/noparse] would come configured with 512KB, 784KB and 1MB of SRAM. The 1M package will reportedly comprise a built-in liquid helium cooling system. Overall, the news was welcomed by Propeller users, but some feared that it could lead to fragmentation of the Propeller ecosystem. In other news, cold fusion comes back from the dead.... Source: crystalball.gargle.com

    P.S.:· I wasn't trying to start something new with using ][noparse][[/noparse] for II, just wanted to throw off search engines.

    Post Edited (JRetSapDoog) : 4/21/2010 4:41:11 PM GMT
  • RvnPhnxRvnPhnx Posts: 36
    edited 2010-04-21 13:26
    JRetSapDoog said...
    .....In other news, cold fusion comes back from the dead....
    Really? It wasn't just hibernating? smhair.gif

    In any case, going from the RTL model (what's living in that FPGA) to silicon can be an interesting process. (And that's even after delegating all of the stuff involving hydrofluoric acid to somebody else....)

    Alas upon graduating a while back I was only able to find work babysitting webservers....so I have to make due playing with somebody else's micros.

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  • pharseidpharseid Posts: 192
    edited 2010-04-21 14:38
    Does anybody remember cache drams? It was a short-lived device used before they could get large caches on microprocessors. It was a combination of a dram with a small high-speed sram. Dram access would take place an entire row at a time, so you might read a kilobyte to the sram in one access. Video dram used the same technique, although some chips only accessed half a row at a time. Reading an entire row at a time, the raw bandwidth is enormous.

    If you're going to do 3D graphics on the Prop ][noparse][[/noparse], something like cache dram would be a nice thing to have. Not only for larger memory size, but the high bandwidth as well. Also, if the cog memory were implemented as cache blocks, you could swap out large code blocks in a couple memory cycles, which would be nice for applications which find the cog memory confining.

    -phar
  • YendorYendor Posts: 288
    edited 2010-04-21 18:09
    I sure hope a Parallax employee doesn't inadvertantly leave the Prop2 prototype around in a German bier house!
  • wjsteelewjsteele Posts: 697
    edited 2010-04-22 00:21
    Yendor said...
    I sure hope a Parallax employee doesn't inadvertantly leave the Prop2 prototype around in a German bier house!

    Hey Chip... I'm buying! Hint, hint, hint! smilewinkgrin.gif

    Bill
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-04-22 01:00
    Do you realise the onchip SRAMs will be running at 6.125ns cycle time !!!!
    160MHz single cycle instructions - and there are 8 processors doing this !!!

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    · Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
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  • HumanoidoHumanoido Posts: 5,770
    edited 2010-04-22 01:30
    The texture mapping is a remarkable accomplishment!

    Here's a link to Turbulence.

    www.linusakesson.net/scene/turbulence/index.php

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    Post Edited (humanoido) : 4/22/2010 5:05:37 AM GMT
  • TonyWaiteTonyWaite Posts: 219
    edited 2010-04-22 08:10
    @humanoido

    Thanks for the Turbulence link ... I had not experienced it before. Stunning!

    T o n y
  • RavenkallenRavenkallen Posts: 1,057
    edited 2010-04-22 16:51
    UGGHH, i am just trying to figure out how to use the prop 1, never mind the prop 2....... SOUNDs cool anyway. I wonder when they are goinh to release it?
  • jmgjmg Posts: 15,173
    edited 2010-04-22 23:33
    JRetSapDoog said...
    ".. I was thinking that getting to 1MB would, in the worst case, quadruple the die size, but hopefully only triple or double it, particularly if the current design has 384KB instead of 256KB.

    Not if they use DRAM, (or a mix of DRAM & SRAM) ?

    Infineon and Rabbit have devices with DRAM to slash the die area cost, and for video apps, dram is fine as the refresh is
    implicit in the scan.
  • dr hydradr hydra Posts: 212
    edited 2010-08-19 11:09
    Any new videos...updates...I hope the new chip is available by December
  • Mike GreenMike Green Posts: 23,101
    edited 2010-08-19 11:17
    As much as people are drooling over any hints of the Prop II, it will likely be a year or more from now before we see it. Don't wait. Enjoy the Prop I. Enjoy what amazing things people are already doing with the Prop I.
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