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32 bit divide — Parallax Forums

32 bit divide

pullmollpullmoll Posts: 817
edited 2010-04-06 18:52 in Propeller 1
I need a 32bit divide with a 32bit result. The standard divide by 16 bit would overflow the quotient: clkfreq / <value between 1 and 16383>.
Would this code do the job?
div32_t1_t2
        mov    t3, #32                ' 32 quotient bits
:loop cmpsub    t1, t2        WC
        rcl    t1, #1
        djnz    t3, #:loop
div32_t1_t2_ret
        ret


Or would it not work for 32bits to have the dividend and the result in the same long? I can't seem to wrap my mind around it.

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Next day he was buried. Face down, nine edge first.

Post Edited (pullmoll) : 4/6/2010 12:05:49 PM GMT

Comments

  • heaterheater Posts: 3,370
    edited 2010-04-06 12:04
    There are a 32 bit divide and multiply routines in the Zog interpreter which originated from the Spin interpreter.

    http://forums.parallax.com/showthread.php?p=878273

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    For me, the past is not over yet.
  • pullmollpullmoll Posts: 817
    edited 2010-04-06 12:14
    heater said...
    There are a 32 bit divide and multiply routines in the Zog interpreter which originated from the Spin interpreter.

    http://forums.parallax.com/showthread.php?p=878273

    Ah, now I see:
    mdiv                    shr     y,#1            wc,wz   'divide
                            rcr     t1,#1
            if_nz           djnz    t2,#mdiv
    mdiv2                   cmpsub  x,t1            wc
                            rcl     y,#1
                            shr     t1,#1
                            djnz    t2,#mdiv2
    
    


    Tricky. I'll try that one.

    Now that I'm looking at my code, I think I'm doing the wrong thing anyway. I need a timer that is originally based on a 2.4MHz clock and divides it by a value between 1 and 16383 (or perhaps 16384, if 0 is used as the divisor). To simulate that, I wanted to divide the prop clkfreq by the divider and set/toggle the timer's terminal count whenever CNT - t0 was if_ae the result of the division. But a divisor of 1 really means toggle at 2.4MHz, while with my division it would instead toggle once per second. Divisor 2 means 1.2MHz, etc. Now how do I get to the required CNT deltas? *goes to think a bit* Hmm.. I would have to divide clkfreq by (2.400.000 / divider). Right?

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    He died at the console of hunger and thirst.
    Next day he was buried. Face down, nine edge first.

    Post Edited (pullmoll) : 4/6/2010 12:57:15 PM GMT
  • ManAtWorkManAtWork Posts: 2,178
    edited 2010-04-06 18:52
    Hello Pulmoll,

    the simplest but probably not the fastest way to do a 32 bit divide would be using two separate registers for dividend and quotient:
                  mov    temp,#32
    :divLoop      cmpsub dist,time wc
                  rcl    speed,#1
                  shl    dist,#1
                  djnz   temp,#:divLoop
    
    

    I use this to calculate speed from distance per time. Don't forget to shift the parameters to the correct bit position, before.

    Cheers
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