Using the HX512 for a VGA Buffer, possible?

tdeyle

If so, has anyone done it yet?

I will admit, I am new when it comes to the art of graphics display. I have read Andre's Hydra book, I have poured over the sample code for the VGA driver, and I have an understanding of how to write to and retrieve from the HX512 card.

However, I am having a hard time in wrapping my head around the actual code itself: I have modified the basic VGA driver found on the Propeller OBEX, trying to figure out where I can access the SRAM while keeping timing for the VGA display in the proper requirements, while maintaining decent refresh rate.

I am using a 480x272, 4 colour LCD with the following specs:

30x17 tiles, with a pixel clock of 10Mhz
Horiz:
front porch = 0.8us
sync = 4.1us
back porch = 4.5us (Includes sync)

Vert: (in Hlines = 53.3us)
front porch = 213.2
sync = 533us
back porch = 639.6us (includes sync)

I have tried to employ a four cog SRAM access setup: where the raster cog would initiate basically a RDLONG command of the SRAM. This would take 22 cycles to complete. If the Prop was running @ 100Mhz, this would equate to 22ns per long, no?

See this where I start getting confused.

So before I go further, I just would like to know, has anyone completed a double buffered 4-color VGA setup utilizing the HX512?

And yes, I have posted this in the XGameStation Hydra forums as well.

Thank you, in advance.

Theo

tdeyle

I should have attached this before, but this was my idea for accessing the SRAM with a RDLONG-like style command, via 4 cogs.

Basically, the left side of the document shows the actual code, colored to show: Giving SRAM Addressing Command, Addressing Lower 8bit, Addressing Upper 8-bit, Giving SRAM Read Command, Reading 4 bytes of data.

The right side shows the Cogs and what they will be doing: I basically transferred the left portion of the document into the cogs, leaving spaces where NOP commands will be used to offset the times where the HX512 bus will be in use.

Again, I am relatively new to ASM programming and I am under the belief that if you mask the DIRA and OUTA registers within a cog, they will not carry their masked values over to another cog. If I am wrong in thinking this, then I can surely shrink this method down.

Theo

Bill Henning

Hi tdeyle,

I am sorry to say there is no way to read a long from HX512 in 22ns - regardless of how many cogs you use.

I strongly recommend you read up on exactly how DIRA/INA/OUTA and the hub works, and how many cycles RDBYTE/WRBYTE (and RDWORD/WRWORD, RDLONG/WRLONG) take.

Even if you hit the hub window perfectly, if you use WRBYTE you can only write a single byte from a cog to the hub every 200ns. If you pack four bytes into a long, you can write (assuming perfect hub synchronization) a long every 200ns (per cog).

As for the HX512 - I believe it will at most present one byte every 40ns (@100MHz) or 50ns (@80Mhz) as I think it uses 45ns static ram (correct me if I am wrong)

You also have to set up the address, and start the transfer.

I hope this helps.

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
www.mikronauts.com E-mail: mikronauts _at_ gmail _dot_ com 5.0" VGA LCD in stock!
Morpheus dual Prop SBC w/ 512KB kit $119.95, Mem+2MB memory/IO kit $89.95, both kits $189.95 SerPlug $9.95
Propteus and Proteus for Propeller prototyping 6.250MHz custom Crystals run Propellers at 100MHz
Las - Large model assembler Largos - upcoming nano operating system

kuroneko

You can get close to 20MB/s transfer rate (see here) but that may not be enough for VGA which - IIRC - requires in the realms of 25MB/s.

tdeyle

Bill Henning said...
As for the HX512 - I believe it will at most present one byte every 40ns (@100MHz) or 50ns (@80Mhz) as I think it uses 45ns static ram (correct me if I am wrong)

No, it uses 10ns SRAM.

But, I do see what you mean about reading the LONG within 200ns. kuroneko's link to the HUB_DMA object was what sparked me into thinking this might work. I just have to find the time to sit down and pour over the code and understand it.

Thanks for the feedback.