Noob - Chip Capabilities Question

Iceblu3710

I just picked up a TQFP prop as well as a high quality 80MHz oscillator and wanted to ask a few questions before I get to making my board.

1) I watched a web video about how you should try to eliminate current from flowing in Vdd/Vss or it could burn PLL logic and im not sure what I should do. I was just going to put a ground plane under the chip and a 0.1uF decoupling cap like I do for all my micros but is their something special I should do?

2) How accurate is the x16PLL anyways? My pics/avrs clocks vary ~1% I decided to just use a reliable 80MHz osc to remove any potential issues but its able to be 1% stable It would be cheaper to just use the standard 5MHz and x16PLL

3) From the description of the chip it looks like the hub only serves shared ram and configuration blocks and each cog has constant IO access. So if I where to do this:

MOV PIN_MASK #$80
MOV PINA PIN_MASK

(I'm just guessing as I have not done any coding yet)

Each instruction takes 4 clk so 80MHz/4/2=10Mhz so the fastest pin toggle I could do is 10MHz and that would consume an entire cog as their would be no more room for any other instructions as I correct?

This is all assuming that each cog can do full IO changes independently of each other. I ask as I need to output a 24bit address every 2MHz and require a 10MHz clock to sync to and figured I would give a prop a try as this way I could still use other cogs for other ops instead of running my own dual micro solution.

Rayman

Regarding the layout, I generally use four 1uF ceramics around the QFP...
You can see an example of how I normally do it here:
http://www.rayslogic.com/propeller/PropPCB/PCB_Boards.htm
(second layout down)


Regarding timing, I have some notes here:
http://www.rayslogic.com/propeller/PulseGen.htm



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My Prop Info&Apps: ·http://www.rayslogic.com/propeller/propeller.htm

Rayman

The PLL is very stable with the usual 5 MHz oscillator, witnessed by the stable NTSC output signal, dervided from a second PLL driven by the first one...

Also, I don't really see how a stable PLL driven by a crystal could off more than the crystal is, percentage wise.

I guess what I mean is that the main PLL just multiplies the crystal freq by 16X.· So, I don't think it adds any error (percentage wise) to the output frequency...

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My Prop Info&Apps: ·http://www.rayslogic.com/propeller/propeller.htm

Post Edited (Rayman) : 2/11/2010 12:33:54 PM GMT

Leon

You wasted your money buying an 80 MHz oscillator, the Propeller has a PLL; all you need is an 5 MHz crystal to get 80 MHz operation. You might need the additional stability, of course.

Leon

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Amateur radio callsign: G1HSM

cgracey

A good indication of the PLL's stability is the pixel-lock of VGA monitors displaying output from the Propeller. If there was significant jitter, pixels would be smearing sideways. That doesn't happen though, as the jitter is very low. All you need is a 5MHz crystal, then let the Propeller wind it up to 80MHz for you.

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Chip Gracey
Parallax, Inc.

MagIO2

The PLL does not add error in terms of frequency, but as far as I understood Chips real random it adds jitter. But jitter should not be a problem if your timing is far away from the 80MHz. So, with your 2MHz requirement there should not be a problem.

I see a bigger problem in syncing the output with a 10MHz clock - if that's really necessary. Maybe you can utilize a counter for your problem? Guess you did not give enough information about what you want to do.
Is the 24 bit output random or is it just an address counter?

cgracey

MagIO2 said...
The PLL does not add error in terms of frequency, but as far as I understood Chips real random it adds jitter. But jitter should not be a problem if your timing is far away from the 80MHz. So, with your 2MHz requirement there should not be a problem.

The main clock PLL cannot be jittered intentionally. The RealRandom object controls a separate PLL within a cog's CTR, so this has no effect on the main clock PLL.

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Chip Gracey
Parallax, Inc.

Iceblu3710

Wow this is an active forum!

I got my 80MHz osc for dirt cheap $1.08 as it contains lead (I love the leaded prices for prototyping, I got ~14,000 603 res/caps for $75 as they contained lead)

I have never used a PLL before but I don't understand how it could not introduce error into a clock as its circuity is a load. Unless its so minute that we ignore it. But I know for later now I can just stick with a 5MHz.

I will most likely use counters to control my three pins as the sequence repeats every ~140k clk's at 10MHz. At each clock I must output either a 6/15/24 (haven't decided yet) address and then increment for the next clk. Its quite a lot to do but that's part of the fun.

1uF decouple caps? Sounds a bit high, I had drawn up for 0.1uF.

To put a damper on my project I just realized I ordered a FT232RQ instead of RL and O.. M.. G.. a 9mm square QFN with 32 leads is soooo not hobby friendly lol good thing I picked up a wallmart toaster oven to try out reflow! On the plus side I can just use my max323 ic and a good ole serial connection for the time being. I will draw up by protoboard and post it either tonight or tomorrow.

Thanks!

Iceblu3710

Well I still suck and routing boards, and I mean really suck...

Attached is my schematic, pretty simple I guess. The 3.3V regulator has a built in PTC so at 700mA it clamps it to 400mA which was quite a nice random find. Mouser had no picture or spec sheet so I had to go looking around and it was cheap!

I'm not sure If I will have the current limiting resisters on all the IO pins but I will etch my board with them and decide later. I don't need any current protection but I'm going to be making a board for my friend and he has pretty much zero electronics knowledge and rather he not fry $8 props...