Decoupling caps, the magic component

FredBlais

I'm writing this topic because I'm becoming confused about when and which value decoupling caps should have, even after long searching on google, I'm still wondering what to do. I'm tired of putting random values without really knowing the reason behind that, and I want to know the effect of not putting one. Some says that it is for removing noise of switching components, does it mean that we do not have to put it on analog component like op amps, buffers or ADCs? Some people are saying to put a "bulk" capacitor near high current chips (like the prop), is it that important, if yes, how much bulky? I even read that we should put a 10nF and 100nF·between each VDD/VSS pair on a chip·(prop 2 should·have lot of that).·I heard on the forum that the prop and the eeprom for the code only needed one decoupling cap, is it a good thing to do?
·

Leon

100nF is fine with the Propeller - one for each Vdd pin. They are essential, you might get away without them but you probably won't. You only need different values like 100nF and 10 nF with high-speed devices. A 10 uF capacitor should be provided at the regulator output or where the 3.3V supply is connected to the board. I use additional decoupling capacitors for the EEPROM and any other chips on the board.

The Propeller PLL circuit can actually be damaged if they are left off. I've known other chips be impossible to program, when I left off the decoupling capacitors as an experiment.

They are also essential on op amps, and on buffers and drivers because of the loads on the outputs.

They won't be effective unless the board is designed properly, of course.

Leon

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Post Edited (Leon) : 12/14/2009 9:23:05 PM GMT

Clock Loop

Decoupling caps, the magical component;
The more you use the smoother you boot;
The smoother you boot the better you spin;
So use Decoupling caps, and you always win.

(done in the spirit of "beans beans the magical fruit")

CannibalRobotics

Oh no, prop-poetry...

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Nick Mueller

> A 10 uF capacitor should be provided at the regulator output

It's good to read the datasheet of the regulator. Some like it, others not!


Nick

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Toby Seckshund

The decoupling caps act as small short term batteries. Small (1nF) are great for very high speed reactions but not so good at long term load vaiations. Medium valued ( 10nF or 100nF ) have greater capacity for lower frequencies, but will react to fast stuff not quite as well. High value "bulk" uF ones will hold higher reserves and react slower. So a mix of these types are used. 10n or 100n at every chip and a bulk every 5 or so. The Prop will be chuntering away withs a mix of 80MHz switching edges and much lower output pin load variaions ( and everything in beween ) and so would love a couple of 100nF and a couple of 100uF ones.

Next you have to think of the types of those caps, they must all react to the broadest mix of load variations, so they must have the lowest Effective Series Reactance. Ceramics for the little ones and good quaility electrolytics ( or tantalums ) along with the shortest broadest power rails.

I try to get two 100nf and two 100Uf tants either side of the Prop, and always cross couple the power pins directly under the 40 pin DIPs.

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Leon

Nick Mueller said...
> A 10 uF capacitor should be provided at the regulator output

It's good to read the datasheet of the regulator. Some like it, others not!


Nick

I didn't mean across the regulator pins, but providing bulk decoupling for the whole board.

Leon

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evanh

Yep, rule of thumb is one ceramic cap per digital IC. And close to the power pins too. Analogue is a much bigger kettle of fish.

The bulk cap can go anywhere. Usually at the incoming supply.

What is not said so far is the importance of a wide ground plane. Making the GND copper pour a wide path is good for stability. It reduces an effect aptly named "ground bounce" where a fast impulse can temporarily raise or lower the localised voltage of the GND trace around that one component. This, not too surprisingly, can corrupt a signal.

Actually, those two are interrelated, the decoupling caps can only do their job if the ground plane is sturdy. The capacitors are there to prevent the power supply from also bouncing.

Finally, my opinion on ceramic caps used for power rail decoupling is that you don't need a 10nF if you are using a 100nF and you don't need a 100nF if you are using a 1uF. I say this, and maybe I'm being naive, because ceramics are a pure capacitive construction. What you do need is good placement so that each capacitor does the best job it can.

AbuZuzu

Evanh is right
You need a good ground plane
You need good placement of the bypass chips
If you do this the precise value and mix of bypass cap values is not terribly critical

If you don't do this looking for magic values for the bypass caps will gain you little

mctrivia

[noparse][[/noparse]ur]http://www.hottconsultants.com/techtips/decoupling.html

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Cluso99

It also depends on what the chips are actually doing. Yes, if the prop is running in slow RC mode and not doing much then you may get away with very little decoupling. But if you are running fast with a lot of outputs toggling, then you will require more decoupling. This is to some extent, a black art.

As a rule of thumb, all IC's should have a 100nF cap across the power pins. Multiple power pins usually means multiple caps. Take a look at the Intel processor chips. You also need tantalums spread about the pcb, depending on the pcbs function. Ground and power planes are pretty essential these days.

For the prop in QFP (for overclocking) I am using 4 x 100nF X7R, 1 x 10nF X7R, 1 x 10uF tantalum. (X7R is a better quality ceramic than a Z5U).

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Links to other interesting threads:

· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)
· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBladeProp is: www.bluemagic.biz/cluso.htm

Dr_Acula

I buy 0.1uF (100nF) decoupling caps in batches of 200 and just put one per chip. It probably results in a few wasted caps but they are very cheap, especially if you get them in bulk.

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mctrivia

I buy 0.1uF caps in 5000 quantities. Only $8 for 5000. put them everywhere.

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cgracey

Leon said...

...
The Propeller PLL circuit can actually be damaged if they are left off. I've known other chips be impossible to program, when I left off the decoupling capacitors as an experiment.
...
They won't be effective unless the board is designed properly, of course.
...

Ommiting caps should not cause any PLL failure, though it will cause malfunction at high speed. What destroys the PLL (actually, the logic circuits downstream from the PLL) is high current running between VDD or VSS pins. Those pins·need to be tied together very closely on the PCB. As Leon said,·good PCB layout is critical. Bad PCB layout can not only cause caps to be ineffective, but give·current·the opportunity to flow between VDD or VSS pins, which can damage the Propeller. The key is to keep things very tight. Make power routing your first priority in a PCB design. Make power traces as short as physically possible, and at least 15 or 20 mils wide.



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Chip Gracey
Parallax, Inc.

Clock Loop

Chip Gracey (Parallax) said...
Bad PCB layout.

I would like to say the prop is pretty hearty tho.
I DO have 0.1uf caps on each prop.

Others here know I have been pretty abusive to the poor prop.
Rippin power legs off,

wiring madness :
http://forums.parallax.com/attachment.php?attachmentid=62967

Still works as good as the day I made it.
And I run an object that outputs digital SPDIF audio on that.


[noparse]:)[/noparse]

Beau Schwabe

It's really not a black art, magic, or whatever you want to call it as much as it's reading between the lines and recognizing that there are parasitic devices created that you may not realize you are creating based on the layout design.

- Increasing the amount of ground plane is good, because it lowers the effective resistance from your power to your device, and it increases the 'Q' factor of your frequency roll-off.

- Making power rails as short and wide as possible also decreases the effective resistance from power to device, while increasing the 'Q'.

- Some capacitor types are better than others, because they themselves have an internal resistance that factors in as well.

- Using different value capacitors in close proximity parallel to one another is ok also, and most effective if there are multiple "frequency poles" in your power signal that you wish to attenuate. Where one value capacitor fails at a particular frequency roll-off, another value capacitor can take the slack.




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Beau Schwabe

IC Layout Engineer
Parallax, Inc.

Toby Seckshund

As has been mentioned here before, the ground plain is as much a part of the cct as the VDD bits, the ccts always seem to show the problems just in the one line. If it is a sheet with the minimal cut outs then it be as benign as possible ( that is the beauty of 4 layer boards, power sorted and some layers for the cct). The decouplers do not mythically conect to a ground that is always completely dead to current flow, so the decoupler acts as a "pinch" reducer, the VDD will try to lower and the ground will try to raise. This analysis can be taken down and down to·ever finer·levels ending up within the subtrate. Tricky to do anything about that, so just bolt on the decouplers as near as possible to as thick a power disribution as possible.

I use toner transfer so 15 mill tracks are the finest, I tend to 40/50 mill VDD and as much on the VSS side as poss (saves on Ferric Chloride as a bonus )

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Leon

Cluso99 said...
It also depends on what the chips are actually doing. Yes, if the prop is running in slow RC mode and not doing much then you may get away with very little decoupling. But if you are running fast with a lot of outputs toggling, then you will require more decoupling. This is to some extent, a black art.

As a rule of thumb, all IC's should have a 100nF cap across the power pins. Multiple power pins usually means multiple caps. Take a look at the Intel processor chips. You also need tantalums spread about the pcb, depending on the pcbs function. Ground and power planes are pretty essential these days.

For the prop in QFP (for overclocking) I am using 4 x 100nF X7R, 1 x 10nF X7R, 1 x 10uF tantalum. (X7R is a better quality ceramic than a Z5U).

It's not so much the frequency as the rise and fall times, which are independent of the frequency, which cause large switching transients.

It's not a black art; decoupling and PCB layout can even be simulated, if you have lots of $$$.

Leon

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Cluso99

Leon & Beau:

Respectfully, it is partially a black art. You can simulate pcb design with lots of $$$ and you can measure noise with lots of expensive test equipment (EMI is usually done in conjunction with an external test house except for the largest of companies). However, you cannot usually simulate all the IC's - try simulating the prop design on your $$$ pcb simulators - only Parallax will have access to this information. Chip manufacturers just do not release this sort of information.

You may have to lay a pcb out multiple times to get the power and ground planes quiet enough to pass EMI certification. This, of course, also includes filtering all inputs and outputs to the device (box, not components). Before someone says, that has nothing to do with decoupling.. yes it does. If you do not have a quiet supply, you will have a noisy pcb. To a large extent, a good designer will often minimise this first up. But there is never-the-less the intuition implied in all of this, which also includes experience, and that is a 'black art'. It is an art learned by trial and error, not taught.

There are 3 main factors that cause noise (excluding the pcb layout and decoupling). Frequency of the chip, the rise and fall times particularly on the output pins, and what the chip is doing.

The Rockwell modem chips of the 90's were extremely noisy, and often resulted in numerous iterations of pcbs, with various versions of the ground and power planes, both analog and digital. Decoupling was extremely important, as was filtering all input and output connections.

There is nothing better than a perfect ground and power plane. However, with tiny and close tracks, this quite often is not easy, even with multilayer pcbs.

I always start with the power and ground layouts. Of course, adding in the tracks will lead to modifications.

Now, having said all of the above, where does that leave the prop?

The prop switches largish currents on the power pins when cog(s) start and stop. Sapieha discovered this. This also occurs with waitxxx instructions. This is one of the reasons Sapieha and I recommend a 10uF tantalum close to the prop power pins. I have provision for additional decoupling caps immediately under the prop chips power and ground pins (TriBlade and RamBlade). We have discovered by experiments that by placing better decoupling at the power/ground pins and good power/ground planes, we can overclock the prop considerably. Sapieha has had a TriBlade running at 120MHz (15MHz pllx8) for well over 6 months now. I am expecting to get similar performance out of the RamBlade.

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Links to other interesting threads:

· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)
· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBladeProp is: www.bluemagic.biz/cluso.htm

Leon

The company I used to work for has never had many problems satisfying the CE requirements, their boards usually pass first time. I designed their first product and it failed on emissions from an RS-232 cable, easily fixed with a little PCB with some ferrite beads and capacitors. Their latest board using a 500 MHz ADI Blackfin did have a problem but it was nothing to do with the PCB - RF coming out of the Blackfin chip was the cause!

We used to book the test facility for a half-day and operate the equipment ourselves for initial testing, which was quite cheap. Any problems were easily identified and fixed and the actual testing was just a formality.

Leon

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Post Edited (Leon) : 12/15/2009 2:57:21 PM GMT

potatohead

Are these largish currents on cog start and stop impacted by frequency?

(great thread all --this is very relevant to me right now)

Let me state that query better.

At a given clock, there is this current occurring with COG run state change. At a different clock, would that current change, and if so how?

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Toby Seckshund

I would guess that the rate of change of the voltages (rise and fall ) would set the individual current "packets", and then the number of the current packets per second will set the measured current. I would expect the rise and fall to be reletivly fixed but probably the act of decoupling would allow a higher energy to be available.

One egg, one chicken ...

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FredBlais

Thanks guys!

By the way, Leon, when do you use ferrite?

Post Edited (FredBlais) : 12/15/2009 11:35:43 PM GMT

evanh

potatohead said...

Cluso99 said...
The prop switches largish currents on the power pins when cog(s) start and stop. Sapieha discovered this. This also occurs with waitxxx instructions.

Are these largish currents on cog start and stop impacted by frequency?
...
At a given clock, there is this current occurring with COG run state change. At a different clock, would that current change, and if so how?

I doubt the currents are large or even much larger than average. The Prop is still a low power device.

I've not read how Sapieha measured it. It's likely that the method of conclusions here is by means of working out, by trial and error, which instructions crashed a Cog when running at the limit of the Prop then using better capacitors to strengthen the power rails rather than monitoring the actual current pulses. These sorts of tweaks do work but it doesn't mean the variations in power demands are notable.

Each running Cog has a demand. I/O pins have a decent demand. Hub accesses may incur a little extra, this could explain a Cog startup surge, particularly if starting all Cogs at once. I can't see any good reason why a Wait instruction needs more power, it's more likely they are just more timing sensitive.

To answer your second question: Yes, the whole IC's power usage is clockrate dependent. And it's not linear either. Every transition requires current to charge/discharge the mosfet gate charges of the following transistors. The speed of the switching is an RC time curve. As the clockrate approaches the knee of this curve the power requirements start rising rapidly. And your nice little digital chip is fast entering the analogue world.

mctrivia

By the way, Leon, when do you use ferrite?

You use them to separate the power plane into smaller areas. good example is the beagle board. look at its schematic. especially around the hdmi output.

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mikediv

Really good stuff guys , mctrivia·awesome link thanks everyone , I always thought it was a pretty basic concept I never really gave it much thought I was suprised by the depth of information on this subject.
·

Leon

A ferrite bead on a wire acts like a very effective choke for high-frequency signals, and forms a low-pass filter with a suitable capacitor. RS-232 connectors are available with them built-in.

Leon

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Cluso99

Ferrite beads are also available embedded on ethernet RJ45 sockets.

Power surges result when the chip turns some part of it's circuits on. The waitxxx instruction stops parts of the cog's circuits and when the point is reached, it turns on again. Quite often this could be followed immediately with output pins changing. All this current adds up. Although this is small in the overall scenario, it depletes the bypass caps if insufficient. The frequency has two effects... firstly, the current used by the chip increases with frequency. Secondly, things happen quicker with higher frequency, which may also increase the current demand. However, the rise times are determined by the chip's geometries, loading, and track capacitance, and not to do with the chip frequency.

So, you can see, frequency does play a part, it just depends on which point you are looking at.

Often, the best solution is to ensure good design practices, and spread the circuit with tantalum capacitors, and a 100nF bypass capacitor at every power pin of the IC to the ground plane. This is also what we have found is required at the prop chip power pins.

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Links to other interesting threads:

· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)
· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBladeProp is: www.bluemagic.biz/cluso.htm