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P8x32a LLVM Target? — Parallax Forums

P8x32a LLVM Target?

jazzedjazzed Posts: 11,803
edited 2010-04-27 22:59 in Propeller 1
Has anyone started writing a Propeller P8x32a LLVM target?
I can build llvm-22.6 on Cygwin if I turn off the profiler.
I've started following the instructions given in Writing an LLVM Backend

Comments

  • lonesocklonesock Posts: 917
    edited 2009-12-12 19:49
    Hey, I never knew about LLVM, thanks for the link! Can you also build it with MinGW? This would be an interesting project. (It would just have to wait in line behind a few other interesting projects wink.gif

    Jonathan

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    lonesock
    Piranha are people too.
  • jazzedjazzed Posts: 11,803
    edited 2009-12-12 20:03
    lonesock said...
    Hey, I never knew about LLVM, thanks for the link! Can you also build it with MinGW? This would be an interesting project. (It would just have to wait in line behind a few other interesting projects wink.gif

    Jonathan
    Thank Ale for pointing this out in the Linux Challenge thread. I'm multi-tasking projects again unfortunately.
    Here's what my gcc says:

    $ gcc -v
    Reading specs from /usr/lib/gcc/i686-pc-cygwin/3.4.4/specs
    (config flags omitted...)
    Thread model: posix
    gcc version 3.4.4 (cygming special, gdc 0.12, using dmd 0.125)
    
    Steve@Vista-Laptop ~/llvm-2.6/lib/Target/P8x32a
    
    


    There is a lot of work to do, but this could make native PASM emitted GNU a reality.
    One giant leap for the Linux Challenge; just another step for wider Propeller adoption.
  • AleAle Posts: 2,363
    edited 2009-12-12 21:10
    jazzed:

    Did you find out how the thing works ?. Is not gnu as still needed ? or llvm supplies that too ?

    And another question I had was... which version of gcc is needed to compile Linux... That we have to find out...

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  • jazzedjazzed Posts: 11,803
    edited 2009-12-12 21:40
    Ale said...
    jazzed:

    Did you find out how the thing works ?. Is not gnu as still needed ? or llvm supplies that too ?

    And another question I had was... which version of gcc is needed to compile Linux... That we have to find out...
    There is an llvm-gcc tool chain - a research paper talks about the extra work that was required to make that compile and boot Linux. They have an example where the issues were resolved enough to boot and run the "bogomips" command. If it's anything like the early days of the MIPS64 ports, the going could be a little rough. I've no idea about current GNU, but it's usually pristine for x86.

    With llvm, you can create a target CPU backend or an IL assembly. To support IL on Propeller would mean emulating it which is disqualified with the challenge. So, a target must be ported. There are many targets now, though I haven't tried any except the default.

    If you download llvm-2.6 sources from llvm.org, you'll go through the normal "tar -zxf llvm-2.6.tar.gz" unpacking, ./configure, make steps. To avoid building profiler which failed for me, I commented out the "ifeq" in llvm-2.6/runtime/Makefile.

    I haven't tried building the llvm-gcc sources yet (all 46MB). I'm kind of afraid to try that on Cygwin. I speculate that we can emit IL from the llvm-gcc binary and use the llvm tools to convert that to native PASM once we have a target ... I could be wrong.

    Given enough resources and head scratching, we can make this work.
  • Cluso99Cluso99 Posts: 18,069
    edited 2009-12-14 04:21
  • skoeskoe Posts: 2
    edited 2010-04-26 09:19
    Any news on this?
  • jazzedjazzed Posts: 11,803
    edited 2010-04-26 15:26
    skoe said...
    Any news on this?
    Hi. I stopped working on this because I ran into issues with Cygwin installation.
    It is still an interesting possibility, but I'm tied up in another project right now.

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    May you create something useful, even if it's just a hack.
  • RossHRossH Posts: 5,519
    edited 2010-04-27 00:38
    @skoe,

    I looked at the LLVM for Catalina. While I have learned never to say anything is impossible with the Propeller, implementing an LLVM on the Prop has many challenges, including:

    - the LLVM is likley to be too complex to fit in a single cog. Despite the name, it is a much higher level VM than (say) the one required for LCC (which is the one I chose to implement for Catalina). And once you need more than one cog performance suffers badly.

    - the LLVM "bytecode" format is very complex. Just for starters, each instruction is a 32 bit unsigned value, with each 32 bit value variable length encoded into from 1 to 5 bytes. If you expand them all to 32 bits then you will suffer the same space problems that Catalina suffers and if you expand them "on the fly" then just decoding each instruction would take a large chunk of cog space.

    Ross.

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  • skoeskoe Posts: 2
    edited 2010-04-27 07:53
    Of course I didn't think about an LLVM bytecode interpreter or a JIT compiler but a native code compiler using the LLVM toolchain. Or to say it in other words: Nearly the same what Catalina does, but with the strong optimization capabilities of the LLVM toolchain. (I found Catalina after having written the post above).

    I looked at porting LLVM to an architecture we use in my company. LLVM has good documentation on how to implement a new backend. But it's still a very challanging and time consuming task.

    btw: The compiler for XMOS XCore CPUs is based on LLVM.

    However, now I found Catalina and I think that should be enough for the Propeller.

    Thomas
  • RossHRossH Posts: 5,519
    edited 2010-04-27 08:38
    @skoe,

    Writing an 'LLVM to PASM' post-compiler for the back-end would work, but you're still going to have to target the ouptut at an LMM VM on the Propeller - nothing else would give you enough memory space. There are several such VMs you could use, including the Catalina VM.

    In a way, it would be kind of fun - the LLVM has some really bizarre 'native' instructions. For example, one instruction is called 'shufflevector' - which 'takes two vectors and returns a vector with the same element type as the input and length that is the same as the shuffle mask'. I can't imagine what this instruction (or some of the other wierd ones) would ever be used for in a compiler - or what kind of machine architecture the LLVM designers thought might just happen to have this as a built-in machine instruction!

    Ross.

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  • scanlimescanlime Posts: 106
    edited 2010-04-27 16:47
    RossH said...
    @skoe,
    In a way, it would be kind of fun - the LLVM has some really bizarre 'native' instructions. For example, one instruction is called 'shufflevector' - which 'takes two vectors and returns a vector with the same element type as the input and length that is the same as the shuffle mask'. I can't imagine what this instruction (or some of the other wierd ones) would ever be used for in a compiler - or what kind of machine architecture the LLVM designers thought might just happen to have this as a built-in machine instruction!

    These are SIMD instructions: Single instruction, multiple data. They operate on a vector at a time, instead of just a single value. Heard of MMX and SSE? These are SIMD instruction sets that modern x86 processors support. You'll also find SIMD on a lot of special-purpose embedded processors like DSPs and especially GPUs.

    SIMD instructions are really important in graphics, since you're often doing the exact same operation on thousands or millions of pixels. 3D shading, video decompression, format conversion, etc. all benefit a lot from SIMD.

    And it turns out that one of the things LLVM has been optimized for is generating code for heavily data-parallel algorithms like you'd find in scientific computing and graphics. At more than one commercial graphics vendor, the shader compiler (for programs you run on the GPU itself) is based on LLVM.

    --Micah
  • RossHRossH Posts: 5,519
    edited 2010-04-27 22:59
    @Micah,

    Thanks for the explanation - I hadn't realized LLVM was also used for graphics. If anyone could identify the subset of instructions required for just GCC support, it would greatly simplify the LLVM back-end.

    Ross.

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