I need to understand this.

Ron Sutcliffe

A few days ago I was writing some driver code in Forth for the HX512K card which I have connected toa·demo board and could not get it would to work has I would have expected.

So I decided to write this Spin code below. No bit twiddling just simple writes to a register.

The Card initializes OK but the state machine does not reflect the state set by the low order nibble. It always comes comes up in the same state. (AKA $F nibble) Just the same has my forth driver

My PASM Driver works ok so I know that the hardware is OK. (but is it ?)

I don’t have access to a scope, but there must be a positive excursion during the register write cycle on Pins 0..3 Its the only explanation I can think of.

It would be nice to get an angle on this. It occured to me that I could even write a very compact piece of driver code for the HX512K that would fit nicely into the Zicog.

Ron

Phil Pilgrim (PhiPi)

When you write outa[noparse][[/noparse]0..31] := $04000008, that's the same as outa[noparse][[/noparse]31..0] := $10000020 or outa := $10000020, which is probably not what you meant. The order of the indices in the subscript determines the order in which the bits in the righthand expression are assigned. There's really no point in using the [noparse][[/noparse]0..31] subscript anyway, since you're assigning to the entire register.

-Phil

MagIO2

There is a difference in writing

outa[noparse][[/noparse]0..31]:= $03000008
to
outa[noparse][[/noparse]31..0]:= $03000008

The byte which contains $03 is written to pins 0-7 AND in opposite order in the first case.
The byte which contains $03 is written to pins 31-24 in expected order in the second case.

Same is true for dira[noparse][[/noparse] ... ].
So, according to your comment in the SPIN I'd guess that you've chosen the wrong order. Use outa[noparse][[/noparse]31..0] instead. This is logically correct, as the most significant bit in the number is on the left. So, the left part of the range (31..) maps to that representation.

Hope this helped and was clear enough to understand.

Ron Sutcliffe

Thanks Phil and MagI02

Ok, here is the new Spin code. The result is the same.· The CPLD is still seeing $F on the prop pins 0..7 on the rising edge of clock (Pin 26)

Spin code· outa [noparse][[/noparse]27..0] := $400_0008 but the· CPLD sees $400 _000F····

Hope this makes sense or have I missed something else again ?
Ron


Post Edited (Ron Sutcliffe) : 11/30/2009 12:22:29 PM GMT

MagIO2

Now we can't help anymore without having more details. Schematic , your piece of PASM code that works as you say.

Mike Huselton

Do you have Andre's driver source code available for testing?

That may help you to step through the logic. He has both Spin and Pasm source.

I have this also.

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JMH

Ron Sutcliffe

Connection to the card are 0..7· DBus
PIN 24 is ctrl _0 and Pin 25 is ctrl_1········
Clk is on Pin 26 and data is latched in a positive going edge.

Standard HX512K hydra mem board but·using Prop Demo Board.· My PASM Driver works fine

Hence we have dira[noparse][[/noparse]27..0]:= $700_000F set pin outputs

To set the machine state (0..$F) on pins 0..7

I am trying to do that without bit twiddling with a mask. So the idea was to do a outa[noparse][[/noparse]27..0]:= $400_0000 but........

I am sure that the problem is a result of writing the data on pins 0..7· ($00) whilst
writing the clock pulse to pin 26 ·at the same time·AKA outa[noparse][[/noparse]27..0]:= $400_0000

The result is that $FF appears on pins 0..7·if ·the DIRA register had been previously set AKA DIRA[noparse][[/noparse]27..0]:= $700_00FF

Any further thoughts ?

Ron

Ron Sutcliffe

Mike yes but I have modified The original code to suit my configuration. I can write a Spin code driver or mod the exiting one, but I want to use direct register addressing, no bit twiddling to keep the code short enough to fit in Zicog. I·can save 10 longs if it is possible to do it this way.





Ron

Post Edited (Ron Sutcliffe) : 11/30/2009 1:24:14 PM GMT

Mike Huselton

Ahh So...

I understand now. Thanks for the clarification.

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JMH

Ron Sutcliffe

Here is·my modified PASM code for my set up.


Ron

MagIO2

But using [noparse][[/noparse] ] is also twiddling with bits. You should simply use

outa := $03000008

Is the code you need in the end SPIN or PASM and your currently only testing with SPIN? If it's PASM you can use the

movs outa, #8
or outa, clk_mask
andn outa, clk_mask

... or to make it even faster, setup a counter to create the clock signal and have several movs in a row.

Ron Sutcliffe

MagI02
PASM
I was thinking in terms of a simpe table of longs to drive the CPLD. Keeping code to a minimum, but I can only do that if I can clk and load in a single write to the outa register. I will look at your the idea of running the clk in the table driver.

Ron