Anyone use Dual Port Ram?

fullspeceng

Is there a good solution to RAM that can be written at high speed AND read out at the same time?

I need some sort of shared memory solution to take advantage of the propeller's parallaxism.

I also need significant amounts of memory, 1megabyte or more. Thanks for the info!

Ale

Depending what you call fast there are several possibilities. It could be good to list your requirements to see what can be suggested. You may consider that the propeller is not the ideal candidate.
An AVR32 for example has built-in SDRAM controller and can reach 210MIPS. An XMOS chip can control a SDRAM directly via bit-bang and reaches around 60 MB/s in burst mode...

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Mike Green

Exactly how do you want to use this? How is the memory going to be accessed? What's generating the addresses? What else is accessing the memory? Remember that the Prop has 32 I/O pins of which 4 would need external logic to properly isolate the I2C EEPROM and PC connection after the Prop has started up. A megabyte would need 20 I/O pins for addressing plus 8 I/O pins for a data bus plus a couple of pins for control. If you're using latches to hold parts of the address, particularly so you can use more than 1 megabyte, you don't need dual port RAM since the other port can access the memory while the Prop is loading the address latch (at least 50ns)

At high speeds, details matter.

heater

Well there dual port RAM devices. I have not checked but I guess they are a) not very big and b) quite expensive.

I'm not sure what you mean by "take advantage of the Propellers parallelism" here.
Driving any kind of RAM over a parallel address/data bus takes up all/most of the Propellers pins. Dual port would need twice as many pins. What I mean is there is "no way out" for any COGS executing in parallel. This is something we see already on the TriBladeProp boards and others. All pins go to RAM only a couple left for maybe serial communication.

Of course a normal RAM can look like dual port if you interleave reads and writes from two different sources using hardware glue logic (or software in the case of the Prop) if you can take the speed hit.

Perhaps you could elaborate on what the problem is you actually want to solve. Other solutions than dual port may surface here.

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fullspeceng

Currently I just need a FIFO buffer that I can write to at around 1mbyte/sec (8 megabits) so not super high speed.

However, I need to write and read at the same time so I can use two different cores, one to write the data and the other to process it.· Well I probably don't "need" anything but that would make life easier [noparse]:)[/noparse]

Any suggestions?· Thanks in advance.

Mike Green

Here's one example of a high speed, high capacity dual-port SRAM with 1 megabyte of storage:
download.cypress.com.edgesuite.net/design_resources/datasheets/contents/cy7c0833v_8.pdf. It's a complex and expensive part to use. If you'd rather use something like a Propeller with some external glue logic, you're going to have to provide much more information about what you're trying to accomplish, what parts you're planning on using and the constraints on speed, board size, costs, complexity, etc.

Bill Henning

If the reader&writer are in the same propeller chip, you don't need external memory at all.

Just set up a circular buffer in the hub.

fullspeceng said...
Currently I just need a FIFO buffer that I can write to at around 1mbyte/sec (8 megabits) so not super high speed.

However, I need to write and read at the same time so I can use two different cores, one to write the data and the other to process it. Well I probably don't "need" anything but that would make life easier [noparse]:)[/noparse]

Any suggestions? Thanks in advance.

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Cluso99

I presume you mean accessing by 2 props or 1 prop and another chip.

There are dual port srams. I used one in 1990. It was simple to use - just looks exactly like 2 srams to the outside world. All contention is handled on chip without delays.

Cypress have quite a few chips - just goto their website. IIRC www.cypress.com

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pharseid

There are also FIFO chips. I think the advantage of using these with the Propellor is that you don't have to generate addresses for them. The chips generally have empty, full and sometimes half-full outputs. Do you actually need a megabyte of FIFO storage, or would just a high-speed FIFO and and a separate megabyte of RAM work?

kwinn

What you want to do would be tricky even with dual port ram. First problem is addressing. One meg of ram requires 20 bits of address and usually 8, 16, or 32 bits of data. To take advantage of a dual port ram would require as much as twice that number of pins. The address/data could be multiplexed to reduce pin usage at the cost of speed, but that removes any advantage a dual port ram provides.

If the reads and writes were mostly from sequential locations some form of external addressing could be used to reduce the address pin count and make a dual port ram more useful. The second issue is the speed difference between the memory and the prop. A prop instruction takes 4 clocks (50nS @ 80MHz) while a static ram chip can be accessed in about 10nS. With external sequential addressing and synchronizing 2 cogs it would be possible to use a standard static ram chip and have one cog to write and a second cog read memory at the full speed of the cog.

fullspeceng

I want to stream data from USB at 12mbps or so using an FTDI 245R and buffer a second or so of data to prevent hiccups so I need a 1megabyte FIFO.· I'd rather just write it to an SD card but I don't think it's very fast (100kbytes/sec?).

Do they make a 1 megabyte FIFO?· If not what's the biggest they make?· Ideally I think I'd have SPI dual port ram so I wouldn't waste so many pins.

pharseid

The biggest I know of are only 8kbytes. An ugly but workable solution would be to use 2 memory banks, buffer all the signal lines twice, one on the Prop1 side and one on the Prop2 side.When Prop1 is writing bank 1, the buffers from Prop2 are tristated, while Prop2 is reading from bank 2, which has all the Prop1 buffers tristated. And vice versa. If you're multiplexing the use of 8 Prop pins to handle both addresses and data, you'll be writing to something as an address buffer anyway. This idea could probably be prettied up a lot with a CPLD or FPGA. In any case, you have the advantage of an arbitrarily large memory buffer.

Ale

There is another way:

You take 1 10/15ns SRAM (1Mx8, 2x512kx8) and connect it to a CPLD. The CPLD has 2 ports one for propI the other for prop 2 then you justwrite some code for interleaved access using a synchronous interface so one clock you can access 1st the other 2nd.
I wrote such code for the VGA/Memory controller in CPLD. Sadly the CPLD used was too small so I ended with only one of the two working. I redid the board and will update the page as soon as I get it both working. Have a look at this thread, where some verilog code is posted: propeller.wikispaces.com/Propeller_CPLD, http://forums.parallax.com/showthread.php?p=845032, it is a work in progress.

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dMajo

@Ale
That is what I have done. Actually I have 1 16bit wide sram (CY1061DV33-10ZSXI) and 2 props with 9bit wide data bus

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lonesock

fullspeceng said...
...
I'd rather just write it to an SD card but I don't think it's very fast (100kbytes/sec?).
...

With FSRW 2.4 running at 80MHz, I get typical speeds of around 1 MegaByte per second if using FAT, or closer to 1.8 MB/s for raw access. This assumes that I use the largest cluster size available for formatting the FAT partition, and that all I'm doing is writing (not handling multiple files, or reading from one and writing to another). This also assumes that I queue up all my data in a buffer that is both long aligned, and a multiple of 512 bytes, then send it out using pwrite (if sending it to a FAT partition). Sending out 512 bytes at a time is ideal.

Jonathan

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lonesock
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fullspeceng

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