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Do the counters have jitter or is my equipment lying to me ? — Parallax Forums

Do the counters have jitter or is my equipment lying to me ?

AleAle Posts: 2,363
edited 2009-10-31 20:58 in Propeller 1
Equipment: Intronix Logic Port (at 200 MS/s and 500MS/s) and 40 MHz Rigol DS1042C Oscilloscope.

Test 1: Two counters from the same COG one at 25 MHz and the other at 50 MHz, it seems ok, no jitter I can see.
Test 2: Two counters from the same COG one at 30 MHz and the other at 60 MHz, jitter, loads of it.

I measured in Real time (400 MS/s) and equivalent time (5GS/s) and in both cases there is not visible jitter at 50 MHz but there is at 60 MHz.

I know my measuring equipment is not high end, not even good, but I was wondering if someone has seen this before. (If someone can/wants to lend me some Lecroy, Tek, Yokogawa or Agilent gear it will be welcomed lol.gif.)

The code used to turn on the counters is shown below, pr is the desired frequency. The counter B is set to 2x the frequency of counter A. The circuit has 2 bypass 100 nF and a 10uF tantalum. The noise has an amplitude of ~50mVpp.

CON

    _clkmode = xtal1 + pll16x
    _xinfreq = 5_000_000

  hp = 640      'horizontal pixels
  vp = 240      'vertical pixels
  hf = 24       'horizontal front porch pixels org 40
  hs = 40       'horizontal sync pixels
  hb = 128      'horizontal back porch pixels
  vf = 4        'vertical front porch lines - orig 9
  vs = 3        'vertical sync lines
  vb = 33       'vertical back porch lines - orig 28
  hn = 1        'horizontal normal sync state (0|1)
  vn = 1        'vertical normal sync state (0|1)
  pr = 25       'pixel rate in MHz at 80MHz system clock (5MHz granularity)

DAT
....


                        movi    ctra, #%00001_101        'enable PLL in ctra (VCO runs at 4x)
                        movi    frqa, #(pr / 5) << 3     'set pixel rate

                        mov     ctrb, #VGACLK          ' clock output
                        movi    ctrb, #%00010_110        ' PLL 2 times pixel rate

                        movi    frqb, #(pr / 5) << 3     'set pixel rate
                        mov     vcfg,reg_vcfg           'set video configuration



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Comments

  • kwinnkwinn Posts: 8,697
    edited 2009-10-30 14:55
    I wonder if this is the result of 25 and 50 MHz being an integer submultiple of the sample rate while 30 and 60 MHz are not. Try a few other frequencies and see what you get.
  • LeonLeon Posts: 7,620
    edited 2009-10-30 17:13
    DSOs sometimes have artifacts with particular frequencies - a colleague had a problem when doing some tests with one. I tweeked the signal generator slightly and the effect disappeared.

    Leon

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  • rokickirokicki Posts: 1,000
    edited 2009-10-30 17:16
    You will definitely have jitter. These are digitally synthesized frequencies containing a PLL that has a specific response, and
    there's no question but they will jitter. The spectrum will be impure. The higher the frequency, the more impurities you will
    see.

    The question is, what are you trying to use them for? If you want to use these signals to drive a linear amplifier to transmit
    RF, it's probably not going to meet FCC regulations. But if all you're doing is toggling a pin to drive your RC car, well, that
    will probably work fine.
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-10-30 18:27
    The jitter is a function of the number of "one" bits after the most-significant "one" bit in frqx. The fewer, the better. You can try dithering the phase. This will require a dedicated cog and will help to spread the jitter spectrum out a little and reduce the intensity of the non-fundamental peaks. But you can't get rid of it entirely without employing an external PLL with a longer time constant.

    -Phil

    Post Edited (Phil Pilgrim (PhiPi)) : 10/30/2009 6:33:02 PM GMT
  • AleAle Posts: 2,363
    edited 2009-10-31 07:16
    I wanted to use it for the CPLD+Propeller board. I works well at 50 MHz but it just does not work well at 60. I'll see if the nice people of the Physics department can lend me one of those high end scopes they (do not) use. When I assert the video enable hte memory should be read for every pixel and should allow interleaved reads. It was just not working, reads meant reading garbage and I wanted to know why and I saw all that jitter and thought with jitter this will not work. But now I'm still not sure if the problem is there. I'll see. Thanks guys!

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  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-10-31 08:10
    I set up a counter with your settings (frqa := $1400_0000) and measured almost no jitter at 1 ms. (i.e. 25 thousand cycles) from the trigger:

    attachment.php?attachmentid=64802

    Next, I added a bunch of lesser-significant-bit garbage to the base frequency for comparison (frqa := $14017646). You can see what a difference these extra "one" bits have:

    attachment.php?attachmentid=64803

    So now I'm wondering: why do you think there is jitter on your signal?

    -Phil


    _
    640 x 480 - 16K
    640 x 480 - 23K
  • AleAle Posts: 2,363
    edited 2009-10-31 12:16
    Because I get a similar picture in my osc to the second one you show @60 MHz and a clear one @50 ? It could be an artifact... If you could try @ 60 I'd really appreciate it.

    thanks

    Ale

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  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-10-31 15:51
    Oh, okay, I just took the value from the program you posted (which is 25MHz, BTW) and used it. I'll give 60 MHz a try later. In the meantime, can we confirm that you're using x8 for the PLL at 60MHz? x4 would require a basis frequency of 15 MHz, which is way to high for the PLL to be stable.

    -Phil
  • AleAle Posts: 2,363
    edited 2009-10-31 18:01
    Phil I'm outputting from counter B, in the code above, VGACLK is the output pin.

                            mov     ctrb, #VGACLK          ' clock output
                            movi    ctrb, #%00010_110        ' PLL 2 times pixel rate
    
                            movi    frqb, #(pr / 5) << 3     'set pixel rate
                           
    
    

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  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-10-31 18:15
    Got it. (I was looking at the wrong counter.) So I tested it at 60MHz with this program:

    [b]CON[/b]
    
      [b]_clkmode[/b]      = [b]xtal1[/b] + [b]pll16x[/b]
      [b]_xinfreq[/b]      = 5_000_000
    
    [b]PUB[/b] start
    
      [b]ctra[/b] := %00010_110 << 23
      [b]frqa[/b] := $1800_0000
      [b]dira[/b][noparse][[/noparse]*0]~~
      [b]repeat[/b] 
    
    
    


    This is what I got:

    attachment.php?attachmentid=64811

    There's less than 1 ns jitter 1 ms out from the initial trigger.

    -Phil


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  • StefanL38StefanL38 Posts: 2,292
    edited 2009-10-31 20:32
    impressive pictures ! Seems to be a PC-based osci

    From Tektronics ?

    How many samples per second can it do ?

    How much money does it cost ?

    Can you post a typenumber and manufacturer ?

    best regards

    Stefan
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-10-31 20:56
    Stefan,

    It's a Tek TDS3034. I think it's been supplanted by a newer model. You can read the specs here. You might be able to find one on eBay; but if you're looking for a new scope, be sure to consider Agilent and LeCroy as well.

    -Phil
  • AleAle Posts: 2,363
    edited 2009-10-31 20:58
    Ok,

    so then my crappy equipment lies to me :-(. Well that means I'll have to get something good.

    Thanks a lot!

    I do not know which model is, but it is not a PC based osc. Yes, it is a Tek smile.gif

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