max propagation delay
I have a parallel bus with the propagation delay difference between shortest trace and longest is 71pS(21mm)
Is there any good rule of thumb for the maximum usable frequency?
I am sure at 100MHz it would be fine being the delay is 142th of the signal frequency but curious what would the max recommended be.
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Post Edited (mctrivia) : 10/20/2009 1:03:48 PM GMT
Is there any good rule of thumb for the maximum usable frequency?
I am sure at 100MHz it would be fine being the delay is 142th of the signal frequency but curious what would the max recommended be.
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propmod_us and propmod_1x1 are in stock. Only $30. PCB available for $5
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Post Edited (mctrivia) : 10/20/2009 1:03:48 PM GMT
Comments
"Is there any good rule of thumb for the maximum usable frequency?" - In this case, you can't go any faster than your longest delay. That's going to be your weakest link. "Every body else" either needs to come down to meet the slowest propagation delay by purposefully introducing delays to the faster lines, or you need to make sure that the data doesn't become valid until the slowest propagation has transitioned.
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Beau Schwabe
IC Layout Engineer
Parallax, Inc.
I agree completely.
I was thinking I do not need to go through the hoops of adding intentional delay to the shortest paths? Running IDE signal bus of only 100 to 133MHz my shortest signal path has a propagation delay of 36pS and my longest of 106pS.
133MHz signal has a bit length of 7.5nS more then 100 times the delay imparted by my traces not being the same length so I am sure I am fine here. I know as long as my delay does not exceed the bit speed in theory it could work but was wondering about safe practices what would be the max?
1/2, 1/4, 1/10 the bit speed. What is safe?
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Want to make projects and have Gadget Gangster sell them for you? propmod-us_ps_sd and propmod-1x1 are now available for use in your Gadget Gangster Projects.
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