I2C timing.
steprog
Posts: 227
Hello,
Can anyone tell me what the speed is set for with the I2C objects here? Im trying to interface with a cypress psoc that is spitting out three integer values. Anyway, I have it set for 100k and I can't find a reference for the I2C object.
Can anyone tell me what the speed is set for with the I2C objects here? Im trying to interface with a cypress psoc that is spitting out three integer values. Anyway, I have it set for 100k and I can't find a reference for the I2C object.
Comments
James
Objects written in Spin will run maybe at 20KHz. Objects written in assembler can run typically at 300-400KHz, perhaps as high as 1MHz. The I2C driver used in FemtoBasic has a user selectable speed, either 100KHz or just under 400KHz.
I was using your basic i2c driver and didn't find any speed controls associated with that. Should I try to find an object that uses FemtoBasic?
Thanks, Greg
---Edit---
So is the Cypress device running as a slave? If so I don't see why it would have a setting for clock speed. It shouldn't be spitting out anything until the master clocks out each bit.
Post Edited (photomankc) : 9/22/2009 6:34:02 PM GMT
A little stump.
the i2cObject v2 already does this
James
1. If the I2C slave requires clock stretching. Most implementations of I2C for the prop dont support clock stretching. Many I2C slaves based on micros use clock stretching, sometimes you can get away without it if you ignore the bad values that occur when the micro isn't ready.
2. If the I2C slave is also a SMBUS slave then there is a minimum clock speed that SMBUS requires and the I2C spin implementations I have tried on the prop break that timing. For example the I2CObjectV2 i2c scan will cause problems for SMBUS slaves - they tend to reset during scan and no longer communicate on the bus, the MLX90614 is an example of an SMBUS slave that resets with I2CObjectV2.
My understanding of the I2C spec is that a slave can delay the master by holding the SCL low at anytime the SCL is low, i.e. when the master stops holding SCL low, it should wait until SCL is high before continuing.
My version of I2CScan that meets the SMBUS timing doesn't do clock stretching and so far I haven't seen a problem.
Do you have pull ups on both SCL and SDA - some of the prop boards dont have pull ups on both
I'm not an I2C guru, but don't you typically only require 1 pullup / termination?·
I typically use 4.7K for 5v data lines on other projects, though I thought I had read that lower values such as 1.8k provide better performance at higher rates.
Too low of a resistance might damage the i/o pins, no?
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It it expensive to check for it? I was wondering since the stuff I'm considering is very similar to what you do with your sensor board. A device that is controlling various hardware and then connecting to I2C to allow another controller to command it. So I was looking around for stuff that allows for Clk Stretching to keep it as flexible as possible to interface with various other controllers.
Ill check it out and see if that fixes my issues.
It says
"The I2C specification indicates that this is an optional feature; not all I2C devices need to support clock stretching. However, at this time all Cypress I2C slave user modules stretch the clock. If a master is used that does not support clock stretching, the bus can lock up and fail to reset"
Your more diligent here than myself. I will let you know how it goes.
Greg
·
You fellas are great. I feel like I got guardian angels or something out there.
*Peter*
Q. My software master I2C code does not read correct data from the SRF08/SRF10, but its works fine with an I2C EEPROM chip. Why is this?
A. The most likely cause is the master code not waiting for the I2C bus hold. This is where the slave can hold the SCL line low until it is ready. When the master releases SCL (remember it's a passive pull-up, not driven high) the slave may still be holding it low. The master code should then wait until it actually does go high before proceeding.
It is not necessary for any design to stretch the clock except for what I would term a kludge to get around a poor implementation. I can use sub $2 micros that support I2C properly but fair enough that you allow for them I guess. I am not aware of any dedicated I2C chip stretching the clock though.
*Peter*
Hello Timmoore,
I tried running you i2cscan unfortunately I couldn't find the fullduplexserial4c object you refer to. I checked the exchange and didn't find it. Could you refer that to me?
Thanks,
Greg
There is an advantage to this when used with a micro that has hardware support - it means that the i2c hw itself waits for conversion completion rather than requiring the software to poll for it. The disadvantage is that the bus stays busy.
-adrian