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Understanding counters, and 32 bit structure — Parallax Forums

Understanding counters, and 32 bit structure

RS_JimRS_Jim Posts: 1,768
edited 2009-08-22 01:22 in Propeller 1
Thanks to Jonny Mac's latest articles in spinzone, I have left my comfort zone of SX and plunged into Prop.

I have been a fan of the SX for a long time but since the EOL announcement, I have been looking at converting one of my projects to Prop.· I downloaded Beau's code on the 2 axis·Memsic 2125·and will use the counter capture ideas for measuring the device.· However, I need to repurpose the code as I have no interest in knowing the tilt angle of the device as it will always be mounted vertically rather than horizontal.· My problem is that I think that I have figured out that the initializing constant of $6800_0000 + Pin sets the counter at Neg detect with feedback.· Where does the feed back go? I get that the counter stops when the Memsic goes low, but what is starting the counter, mov PHSA,1?· That seems to me to be introducing an error, if the X,Y pulses don't start at the same time.· Where do I find some additional info on the use of counters· in the monitor mode.· I also need for the same project to measure the duration time between pulses.· The actual duration of the pulse + to - is irrelavent, just the time between rising edges.· Do I use both ctra and ctrb and alternate between them to get the info? I have seen lots of info about using the counters to generate outgoing pulses but am not finding a lot of examples of incoming measurements.

I also had a question about ASM math.· I get that the registers are 9BIT however, if I do a mov a,ctr can I then do MOV b,a and have all 32 bits move?· Then what happens when I Sub b,a (after a second read?) does it handle all 32 bits or do I have to treat it like a 4 byte sub with carry?

Thanks for all the great feedback here in these forums.

Comments

  • KyeKye Posts: 2,200
    edited 2009-08-20 14:25
    Everything is 32 bits. Only the first 9 bits can be used for literals.

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    Nyamekye,
  • kwinnkwinn Posts: 8,697
    edited 2009-08-20 14:54
    The registers are all 32 bits. When you specify a literal (ie. mov a, #17) with #, the "17" would be a 9 bit value in the source field of the "mov" instruction. The value "17" would be stored in the 32 bit register "a".

    The same is true of the jump instructions. The source and destination fields are 9 bits (which is likely the main reason why cog ram is 512 longs). This is actually a very consistent addressing scheme, even though it takes a bit of getting used to after programming other chips.
  • ericballericball Posts: 774
    edited 2009-08-20 17:03
    Radio Shack Jim said...

    I also had a question about ASM math.· I get that the registers are 9BIT however, if I do a mov a,ctr can I then do MOV b,a and have all 32 bits move?· Then what happens when I Sub b,a (after a second read?) does it handle all 32 bits or do I have to treat it like a 4 byte sub with carry?

    Just to elaborate on kwinn & Kye's comments.

    Each PASM opcode has a 9 bit destination field and a 9 bit source field.· The destination field always points to·a cog RAM "register", while the source may either be a register or a 9 bit unsigned immediate value (depending upon the I flag in the opcode), indicated by # in the source code.· The actual "registers" are 32 bits.·

    Note: one important aspect of PASM is there is little distinction between code & data.· In fact, there are certain opcodes (i.e. MOVI) which exist to make it easier to treat code as data.

    Also, each PASM opcode has three flags controlling whether the Carry and Zero flags are changed by the opcode and whether the destination register is written to.· In order to update the Carry flag, you need to specify WC in the source code.· WR (write result) and NR (no result) are implied by the various opcodes but may be explicitly set in the source code.


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  • RS_JimRS_Jim Posts: 1,768
    edited 2009-08-21 13:31
    Thanks all for the response regarding 32 bits. I learned a lot. Now, about those counters?
    Jim
  • KyeKye Posts: 2,200
    edited 2009-08-21 15:09
    The counters are controlled by three registers. CTRA, FRQA, PHSA.

    Depending on the mode in CTRA (please read the maunal) The value in FRQA is added to PSHA every clock cyle in the mode condition is meet.

    That's basically it. Using different modes interesting things can happen.

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    Nyamekye,
  • RS_JimRS_Jim Posts: 1,768
    edited 2009-08-21 15:14
    Nyamekye,
    If I am using the CTRA mode Neg with feedback, and I use a Waitpeq MASK_VALUE,MASK_VALUE, does the pause in exicution of the COG include the pausing of the CTRA? so that when i use WAITPEQ zero,MASK_VALUE it runs until I stop it with the negitive transition?
    Jim
  • KyeKye Posts: 2,200
    edited 2009-08-21 21:28
    The cogs run seperately I believe. Never tired anything like that. I soppose the wait instructions however from working with video do not affect the counters.

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    Nyamekye,
  • CounterRotatingPropsCounterRotatingProps Posts: 1,132
    edited 2009-08-22 01:22
    Radio Shack Jim said...
    Nyamekye,
    If I am using the CTRA mode Neg with feedback, and I use a Waitpeq MASK_VALUE,MASK_VALUE, does the pause in exicution of the COG include the pausing of the CTRA? so that when i use WAITPEQ zero,MASK_VALUE it runs until I stop it with the negitive transition?
    Jim
    Jim,

    looking at the Prop manual ... seems that the counters always tick with the system clock, but can be reset/altered at any point. I *think* the wait affects only the cog, not the counters (unless, of course, you're altering the counter in someway via a wait loop %-)

    I'd just try some test code and see what you get. Please post your results, if you have time, as we can learn too.

    - Howard

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