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Point me to a good detailed reference of configuring video plz — Parallax Forums

Point me to a good detailed reference of configuring video plz

Agent420Agent420 Posts: 439
edited 2009-08-20 11:02 in Propeller 1
I know there must be some good in depth discussion regarding how to set up the video configuration on the Prop...· I don't see any in the forum stickies and the official datasheet and manual aren't very clear imo.· The example Spin programs are nice but do not go into much detail.

Basically I'm looking for topics such as:

Given a desired resolution and refresh rate, how do you calculate the various registers (VSCL).

It appears that although the Prop describes these features as "Video Generators", they are almost more like clock pattern generators on steroids; you still have to manually create the different video signal components such as V/H Front/Back porches etc...· Is there a concise reference to these elements?

I tried using the forum search, but the various video terms appear so frequently it is difficult to identify good threads.

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Comments

  • blackmesa82blackmesa82 Posts: 4
    edited 2009-08-19 19:24
    As far as books go, I don't know of anything better than Andre Lamothe's "Game Programming for the Propeller Powered Hydra."

    There is an excellent section on setting up the counter and video hardware and, along with a timing diagram that I found on the web somewhere, it was detailed enough to help me write a VGA driver from scratch. (NTSC video is also covered.)

    This book is my primary reference for Propeller programming, even when I am not working with the Hydra.

    - eeo
  • KyeKye Posts: 2,200
    edited 2009-08-19 19:48
    How I got my vga driver started·working. You'll need to study how code works as there really isn't a manual for what to do. The video unit is described perfectly in the prop manual. However, it won't dawn upon you on what to do with it unless you know how to create a vga/pal/ntsc signal.

    http://forums.parallax.com/showthread.php?p=765369

    Note that there is a sync problem with that driver. The vertical sync line is pulsed twice instead of once, you'll need to fix·that problem·you want to use it (A trival fix if you know whats up)·Otherwise the driver is a good starting point.

    Just try to understand what the code is doing to learn.

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    Nyamekye,
  • Agent420Agent420 Posts: 439
    edited 2009-08-19 20:28
    Thanks for that reference, it's a good start for me.

    Still would be nice if the manual included more in depth discussion to this topic, I guess it is technically described but that doesn't do much good.· As the video generators are one of the more unique features of the Prop, it would be great if there was more information available.

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  • Bob Lawrence (VE1RLL)Bob Lawrence (VE1RLL) Posts: 1,720
    edited 2009-08-19 20:58
    This may give you a few ideas:

    50 Line graphics driver.

    http://forums.parallax.com/showthread.php?p=735672
  • Cluso99Cluso99 Posts: 18,069
    edited 2009-08-19 22:48
    The wiki also has good references to how video VGA and Composite work.

    There is a VGALearn set of files by fletch which is a VGA tutorial - it is a nice tutorial and has links - I think I found it on the OBEX?

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    Links to other interesting threads:

    · Home of the MultiBladeProps: TriBladeProp, RamBlade, TwinBlade,·SixBlade, website
    · Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
    · Prop Tools under Development or Completed (Index)
    · Emulators: Micros eg Altair, and Terminals eg VT100 (Index) ZiCog (Z80) , MoCog (6809)
    · Search the Propeller forums·(uses advanced Google search)
    My cruising website is: ·www.bluemagic.biz·· MultiBladeProp is: www.bluemagic.biz/cluso.htm
  • ericballericball Posts: 774
    edited 2009-08-19 23:59
    I'd recommend checking out the NTSC/PAL template code in my sig as a starting point.

    The base unit in Propeller graphics is the PLLA clock cycle.· For VGA output the PLLA clock frequency is often the same as the pixel clock frequency.· For TV output the PLLA clock frequency is 16 the colorburst clock frequency.· The PLLA clock frequency is determined by the FRQA and CTRA registers.· You then use the VSCL register to indicate the number of PLLA cycles per pixel and the number of PLLA per "frame", or when the VSCL register and the color and pixel registers are reloaded and the next WAITVID is continues.· Video drivers are constrained by WAITVID to WAITVID timing.· In the inner active display loop, this determines the maximum resolution at a given clock frequency.· Other WAITVID to WAITVID intervals (e.g. front porch) determine the minimum clock frequency.

    The actual timings depend upon the resolution and your display device.· You are correct that the video driver has to generate all of these signals itself.

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    Composite NTSC sprite driver: Forum
    NTSC & PAL driver templates: ObEx Forum
    OnePinTVText driver: ObEx Forum
  • Agent420Agent420 Posts: 439
    edited 2009-08-20 10:06
    Thanks for all the input.· It's slowly sinking in ;-)

    Btw, during my research I note there is a good article on Propeller NTSC video in the May 09 issue of Circuit Cellar.· Here is a quote that explains the timing calculation; I think something like this would be a good way to present this information in the manual...· A table identifying the scan line timings, v/h synch requirements and f/b porch data would be great.
    Circuit Cellar 0509 said...
    The digital outputs are meant to interface to an external DAC producing composite NTSC video output. Because a composite monitor presents a 75-Ω load, discrete resistors can be used to implement a DAC (see Figure 2). The VCFG 32-bit register is used to configure the VSU in a number of modes (i.e., Composite Baseband, Composite Broadband) (55.25 MHz = channel 2) or VGA (see Table 1). The VSCL 32-bit register contains two values: the number of CTLA PLL clocks per pixel (PixelClocks), and the number of clocks per frame (FrameClocks) (see Table 2). A CTRA PLL clock is based on your XTAL value, the PLL multiplier, and the CTRA PLL divider. When using NTSC, the active pixel area of a scan line is 52.6 μs. If you want to divide this into 256 pixels, that’s approximately 205 ns/pixel (52.6 μs/256 pixels). If the CTRA PLL clock is running at 40 MHz, that’s 25 ns (1/40,000,000). The closest you could come to 205 ns would be to use a count of eight CTRL PPL clocks. That would be 200 ns (PixelClocks = $08). If you were using 2-bit (four-color) mode, you would be storing 16 pixels worth of 2-bit information in each 32-bit double word. This means that the FrameClocks value would need to be 16 pixels × Pixel- Clocks, in this case 8 (FrameClocks=$080).

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    Post Edited (Agent420) : 8/20/2009 11:45:58 AM GMT
  • Agent420Agent420 Posts: 439
    edited 2009-08-20 11:02
    ·
    Bob Lawrence (VE1RLL) said...
    This may give you a few ideas:

    50 Line graphics driver.

    http://forums.parallax.com/showthread.php?p=735672
    ericball said...
    I'd recommend checking out the NTSC/PAL template code in my sig as a starting point.
    THESE should be a stickies !!!

    Thanks much, great documentation there.

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    Post Edited (Agent420) : 8/20/2009 11:08:59 AM GMT
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