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1 Xtals and 2 propellers — Parallax Forums

1 Xtals and 2 propellers

Zap-oZap-o Posts: 452
edited 2009-08-23 11:39 in Propeller 1
I was wondering if I could use 1 xtal and run 2 props off of it. Is there a down side to this? I am trying to save board space and cut cost a little. nono.gif

Comments

  • Mike GreenMike Green Posts: 23,101
    edited 2009-08-18 15:08
    You can sort of do it, but probably not the way you think.

    1) You can't directly drive the 2nd Prop from the crystal pins of the 1st Prop. The likelihood is that, if you attempt to attach anything else to the crystal pins, it will stop oscillating.

    2) You have to have a program in the 1st Propeller that specifically sets up one of the cog counters to produce the clock you want on one of the I/O pins. If the 1st Propeller reboots for any reason, the 2nd Prop will stop working until some cog starts up its cog counter to supply a clock. If you're running a terminal emulator or other "runs forever once started" sort of program on Prop #1, this need isn't really a problem.
  • Agent420Agent420 Posts: 439
    edited 2009-08-18 15:13
    I'm not sure you can do this, the crystal requires an resonant circuit to operate and the load of driving 2 chips would probably cause problems.· Besides, crystals are only ~1$, you might even be able to mount it on the bottom side of the board if space is that much of a concern.

    You could probably use an oscillator to drive multiple Props, they' not expensive but they'd still cost more than 2 crystals.

    edit -

    Mike's suggestion of using a cog and io pin to generate the 2nd clock is fine; seems like a waste of resources, but if you end up with an unused cog and pin then what the heck.· Just remember the 2nd Prop requires the 1st to be running.

    Post Edited (Agent420) : 8/18/2009 3:18:56 PM GMT
  • dMajodMajo Posts: 855
    edited 2009-08-18 15:31
    The good practice that should work should be an single gate (buffer or AND with shorted inputs) IC connected from the xout of the first prop (the one with the crystal) to the xin of the second prop. On PPDB I have tried direct connection between xout of the first to the xin of the second prop, inserted on the bredboard area, and it worked but I will not recommend laying out a pcb like that.

    Edit: You can also make an oscillator with a crystal, 2 resistors, 2 capacitors·and two inverter gates which can drive the two props

    Post Edited (dMajo) : 8/18/2009 3:38:24 PM GMT
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  • mikedivmikediv Posts: 825
    edited 2009-08-18 17:12
    Mike I never thought of that, would driving the next prop chip from the first chip using the setup you suggest be as accurate as using a crystal also would I be able to change clock frequency on the fly to the second chip????
    And I guess I have to ask can I drive more than one extra prop chip in this way ???? use as many output pins for clocks as I Want to drive other prop chips?

    dMajo does that circuit show 4 outputs?? or 2 do you know the values for outputting a clock of 5,Meg also if you don't mind can you state which IC chip to use?

    Oh dMajo I should explain I can not see your hi res photo in case you have schematic values in there.

    Post Edited (mikediv) : 8/18/2009 5:17:58 PM GMT
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-18 17:28
    Morpheus was originally designed to drive Prop#2's xinput from P20 on Prop1, but some quick testing before UPEW indicated that for an unknown reason video drivers did not like that.

    It is still a build option, P20 is brought out very near xinput, and can be jumpered instead of a crystal - but for now that is not an "officially supported" way of running Morpheus.

    Theoretically, you could output up to 16 different clock frequencies to drive other propellers using the counters on all eight props, more if you use:

    zero long 0
    ones long $FFFFFFFF

    then for the ones that don't need higher than 5MHz:

    loop mov outa,ones
    nop
    mov outa,zero
    jmp loop

    In one cog will give you as many 5MHz signals as you want.

    Ofcourse one Prop pin driving a hex inverter will drive six props...

    mikediv said...
    Mike I never thought of that, would driving the next prop chip from the first chip using the setup you suggest be as accurate as using a crystal also would I be able to change clock frequency on the fly to the second chip????
    And I guess I have to ask can I drive more than one extra prop chip in this way ???? use as many output pins for clocks as I Want to drive other prop chips?

    dMajo does that circuit show 4 outputs?? or 2 do you know the values for outputting a clock of 5,Meg also if you don't mind can you state which IC chip to use?

    Oh dMajo I should explain I can not see your hi res photo in case you have schematic values in there.
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  • Mike GreenMike Green Posts: 23,101
    edited 2009-08-18 17:32
    Yes, it would be as accurate as using a crystal. The 1st Prop's counters run off the system clock which uses the crystal for its reference.

    You can output as many different clocks as you have available cog counters and I/O pins. Each cog has two independent cog counters and there are 8 cogs.

    dMajo's circuit shows 4 outputs using a hex inverter like the CD4069. C1 and C2 depend on the crystal you're using. They're made for specific capacitor values, typically 20pf or 32pf or sometimes lower.

    Here's an application note: www.fairchildsemi.com/an/AN/AN-340.pdf
  • dMajodMajo Posts: 855
    edited 2009-08-18 17:34
    @mikediv
    I have seen the attachment is not visible, but I can view it by clicking on it. the hires example have one output: it can drive up to 6/8 devices without problem. the hires1 is an expanded example showed once to mctrivia as he needs to drive 32 props at that time. basically have a look on the eg. TI website serch single/dual up to six unbufferred inverter gates IC: they have some specifically designed for oscillator pourposes. tomorrow I will have a look for you

    BTW: with 30mA (prop pin) you can drive much more than one prop this way. of course you need separate pins if you need different frequency for each prop. Until you use power of 2 values (and do not introduce jitter) in counter registers the accuracy should be the same as the one of the main prop crystal (if I am wrong someone correct me please)
  • Agent420Agent420 Posts: 439
    edited 2009-08-18 17:44
    Depending on supplier, I'd guess the oscillator inverter solution to be of similar or greater cost than 4 crystals, and occupy more board space.· Plus you'd have to route your clock signal around the other chips to get to their destination.

    I'm sure these solutions are possible, but I wonder just how limiting space and money is to consider alternatives?· I might look into one Prop driving the other, but more than that and I think a 50 cent crystal might be the easiest / cheapest solution.

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  • dMajodMajo Posts: 855
    edited 2009-08-19 10:06
    @mikediv

    one of this will do the job:

    Cheers
  • dMajodMajo Posts: 855
    edited 2009-08-19 10:23
    Agent420 said...
    Depending on supplier, I'd guess the oscillator inverter solution to be of similar or greater cost than 4 crystals, and occupy more board space.· Plus you'd have to route your clock signal around the other chips to get to their destination.

    I'm sure these solutions are possible, but I wonder just how limiting space and money is to consider alternatives?· I might look into one Prop driving the other, but more than that and I think a 50 cent crystal might be the easiest / cheapest solution.
    I have not looked at it. Sometimes you have other targets to reach, it depends on the application. One development I am working on have two props, sram, cpld·... and because of the timings and that I want/need the 2 props perfectly synced I am supplying a 80 MHz clock to the props directly from the cpld that receives a 160 MHz from my laboratory generator.

    Now I have also this units CY22150KFC/CY22393FXC: when start again on this project I need to try if this programable clock generators are suitable for this design and accurate enough for prop video/vga purposes

    I thought also to connect the 5MHz crystal to the cpld but then I need a way to multiply it by 32 (now x2 is a delay line and a xor). Maybe this circuit cascaded many times with calibrated delay lines to preserve the 50% duty cicle? I can not afford to a final divide by 2 because than I need to start with a x64 and I run out of the cpld max frequency. Any ideas on it from the community? (EDIT: target devices Altera MAX II or Xilinx Coolrunner II both max freq 200MHz and without PLL)

    Post Edited (dMajo) : 8/19/2009 10:34:35 AM GMT
  • Agent420Agent420 Posts: 439
    edited 2009-08-19 17:25
    If you need multiple Props with a synched clock, I agree that's another story.· But to go through all that in an effort to save a few cents and a few mm^2 of board space seems like more effort than you'll get return.

    But I've also done thing just because, so whaddevar ;-)

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  • HarleyHarley Posts: 997
    edited 2009-08-19 18:31
    Here's the approach I'm using with one crystal and two Props. In my initialization, the first Prop using the crystal, 5 MHz, runs at 80 MHz. It uses a counter to generate a 5 MHz output, thus uses one I/O pin but NO hardware. The Props are end-to-end spaced about 3" on a pcb; poses no problems. Uses A24 for 5 MHz output in this case.

    PRI InitProp1                      ' Initialize Prop#1, 5 MHz output, display and comm
    '                 Mode  PLLDIV            Apin     ; Init counter for 5 MHz synth. 
      CTRB := %00100_000 << 23 + 24 ' set to NCO-mode, Apin use (= pin 33)
      FRQB := $1000_0000            '  set FRQB for 5 MHz 
      DIRA[noparse][[/noparse]24] := 1                 ' set pin 33/A24 to output for Prop#1 interrupt to Prop#2  
    
    


    Hope this helps. yeah.gif

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  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-08-19 19:05
    Harley,

    Is the slaved Prop able to generate color composite video without any trouble?

    -Phil
  • HarleyHarley Posts: 997
    edited 2009-08-19 20:45
    PhiPi said...

    Harley,

    Is the slaved Prop able to generate color composite video without any trouble?

    -Phil
    Unfortunately I cannot test that mode. Prop#2 doesn't 'do' any video output; only Prop#1 the way it was originally configured.

    Wish I could answer your question either way, yes or no. Sorry. I suppose if I had the time to try that there would be a way to check it out.

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  • MicrocontrolledMicrocontrolled Posts: 2,461
    edited 2009-08-20 00:34
    That is pretty cool, to drive 2 Props with one crystal.

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  • dMajodMajo Posts: 855
    edited 2009-08-20 05:58
    Phil Pilgrim (PhiPi) said...
    Harley,

    Is the slaved Prop able to generate color composite video without any trouble?

    -Phil
    Phil, are you saying that I won't be able to do video stuff by supplying 80MHz clock to prop through the cpld ?

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  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2009-08-20 07:15
    The cost savings are not realy that high. in not using another Xtal. but you will never get two Xtals to track together without PLL to do so. I have used oscillator modules, out of convienience but I do use outputs from the prop to drive my Z80 as it gives me so much choice, via a KBD and not Ferric Chloride.

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  • mikedivmikediv Posts: 825
    edited 2009-08-21 23:39
    Thank you all for taking the time to explain this. cost wasn't really an issue for me since most of my prop work right now is just a hobby for me. But I have been very fascinated by the ability of the prop chips to paralleled
    I am bread boarding a 2 prop circuit and I am going to try both methods ,"drive one prop with clock and use the prop ship to generate clock frequencies to drive the other prop chip " and since it was mentioned I am going to try the composite output to see if ti works. I also plan on trying dMajo thank you sir for all the info as well as the chip parts. Not to change the subject but I would love to see a topic on constructing a multi prop proto board with some software examples the hardware seems easy enough but once done what can we do with it besides having lots of I/O
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-08-22 00:18
    dMajo said...
    Phil, are you saying that I won't be able to do video stuff by supplying 80MHz clock to prop through the cpld ?
    That might be okay. But I remember a post by Bill Henning from which I inferred that a Prop-generated 5MHz clock to which a PLL in a second Prop was applied to boost it to 80MHz had sufficient timing issues to make accurate video generation difficult. I may be completely out in left field with that interpretation, though, hence my question.

    BTW, I've replaced my lab CRT TV monitor with a cheap flat screen TV that can do both NTSC and VGA. I've found that it's much less forgiving of minor timing discrepancies than he old set, producing "zipper" artifacts (a.k.a. the "creepy crawlies") where none existed before. What's interesting, though, is that, by lying a little about _xinfreq, I can pretty much eliminate them.

    -Phil
  • dMajodMajo Posts: 855
    edited 2009-08-22 04:54
    @PhiPi

    I can only think that this could happen because of the three serial pll (one in the first prop, one in the second master clock and the third in the counter-video hardware). Maybe in such apps can help to provide the second prop directly with a 80M clock avoiding so many cascaded jitters? Nedd to try, actually just a consideration.

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  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2009-08-22 14:11
    @PhiPi

    I wonder if the chroma crawl was always there but through focus problems there were blissfully hidden. The LCD will light up extra pixels on discete columns and make it look worse.

    The crawl can never be got rid of, just hidden as best as possible with careful choice of subcarrier/horizontal frequencies, 1135/4 x Fh +25Hz for pal. This gives an eight field repition and the appearance of one complete crawl from top to bottom of frame once every 4 seconds. OK for moving pics, visiable on the green/magenta lurch in the centre of colour bars

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  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-22 17:28
    True, I did have issues generating video under those circumstances.

    What might work better is to generate a 10MHz clock and only use PLL8x in the second prop - dividing the second prop's PLL output by two might get rid of some of the jitters. If you try this, make sure you use NCO mode on Prop1's counters.

    When I have some time I will try this again... the first time I did it I was fairly new to the counters, but with the Morpheus XGA and SVGA bitmap drivers, I've become a lot more familiar with them [noparse]:)[/noparse]
    Phil Pilgrim (PhiPi) said...
    dMajo said...
    Phil, are you saying that I won't be able to do video stuff by supplying 80MHz clock to prop through the cpld ?
    That might be okay. But I remember a post by Bill Henning from which I inferred that a Prop-generated 5MHz clock to which a PLL in a second Prop was applied to boost it to 80MHz had sufficient timing issues to make accurate video generation difficult. I may be completely out in left field with that interpretation, though, hence my question.

    BTW, I've replaced my lab CRT TV monitor with a cheap flat screen TV that can do both NTSC and VGA. I've found that it's much less forgiving of minor timing discrepancies than he old set, producing "zipper" artifacts (a.k.a. the "creepy crawlies") where none existed before. What's interesting, though, is that, by lying a little about _xinfreq, I can pretty much eliminate them.

    -Phil
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  • dMajodMajo Posts: 855
    edited 2009-08-22 18:51
    Bill Henning said...

    What might work better is to generate a 10MHz clock and only use PLL8x in the second prop - dividing the second prop's PLL output by two might get rid of some of the jitters.
    I do not think it will get rid of the jitters but for sure it will make duty cycle 50%

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  • DroneDrone Posts: 433
    edited 2009-08-23 11:39
    Phase noise in the frequency domain is an indicator of jitter in the time domain. Lower phase noise means less jitter (ya I know it's a simplification). In an ideal World, when you divide by N your phase noise (hence jitter) is reduced by the factor 20*log(N) (where log is the base 10 logarithm). When you multiply by N your phase noise increases by the same amount.

    Divide by 2, phase noise improves by 10*log(1/2) = -3 dB

    Multiply by 2, phase noise degrades by 10*log(2) = +3 dB

    In the real world bad practices in division can reduce jitter less than expected or actually increase jitter. Micrel, for example www.micrel.com makes some nice high-speed low jitter dividers (good luck trying to actually buy their components through).

    Just for fun, here's an online phase noise to jitter calculator for you:

    www.jittertime.com/resources/pncalc.shtml

    Yikes! Stuff like this off the top of my head - time to get a life =|

    Post Edited (Drone) : 8/23/2009 11:46:06 AM GMT
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