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Any reason I can't use CTRA NCO mode for video? — Parallax Forums

Any reason I can't use CTRA NCO mode for video?

Bill HenningBill Henning Posts: 6,445
edited 2009-08-18 16:24 in Propeller 1
I'm in the midst of trying to get a new video driver running, and I am having "issues".

I realize it is not documented, but I thought I remembered reading in the forum (I tried search.parallax.com to find it) that I could use the NCO mode and get a video dot clock from that - without using the video PLL's.

I am trying something very simple, which works fine for generating a 40MHz square wave on an output - but I want to use it for the video generation, bypassing the video PLL.

Any ideas?

                    mov     ctra, ctra_val
                    mov     frqa, frqa_val

ctra_val        long    %00100_111 << 23 + 30 << 9 + 30  'Establish mode and APIN (BPIN is ignored)
frqa_val        long    $8000_0000



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Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller

Comments

  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-08-17 19:33
    Bill,

    I'm virtually certain it has to be a PLL. What you're probably remembering is the "discovery" that it doesn't have to be mode %00001, necessarily, but any PLL mode, including those that output to a pin.

    -Phil
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-17 22:14
    Hi Phil,

    Ugh. That is a pain in the posterior - the 800x600 60Hz timing needs a nice 40MHz dot clock, so I was hoping I could get around my multi-cog sync problem by leaving the PLL out of the equation.

    What I ended up trying was generating a nice 5MHz square wave, letting the video PLL multiply it up, and use that... but no joy.

    I posted the SVGA driver on my downloads page, both it and the XGA driver have the same sync issue.
    Phil Pilgrim (PhiPi) said...
    Bill,

    I'm virtually certain it has to be a PLL. What you're probably remembering is the "discovery" that it doesn't have to be mode %00001, necessarily, but any PLL mode, including those that output to a pin.

    -Phil
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-08-17 23:09
    Bill,

    I wrote the following to see if two 40MHz PLLs could be synced with each other, and it appears that they can. The phase error I'm measuring is a nanosecond or less.

    [b]CON[/b]
    
      [b]_clkmode[/b]      = [b]xtal1[/b] + [b]pll16x[/b]
      [b]_xinfreq[/b]      = 5_000_000
      pin_group     = 0
    
    [b]PUB[/b] start
    
      [b]dira[/b][noparse][[/noparse]&#173;0&#093;~~
      [b]cognew[/b](@syncpll_1, 0)
      [b]cognew[/b](@syncpll_2, 0)
      [b]waitcnt[/b]([b]cnt[/b] +clkfreq)
      [b]outa[/b][noparse][[/noparse]&#173;0&#093;~~
    
    [b]DAT[/b]
    
                  [b]org[/b]       0
    syncpll_1     [b]mov[/b]       [b]dira[/b],[b]dira[/b]1
                  [b]mov[/b]       [b]ctra[/b],[b]ctra[/b]1
                  [b]mov[/b]       [b]frqa[/b],[b]frqa[/b]1
                  [b]waitpeq[/b]   one1,one1
                  [b]mov[/b]       [b]phsa[/b],#0
    :forever      [b]jmp[/b]       #:forever
    
    [b]dira[/b]1         [b]long[/b]      $0000_0002
    [b]ctra[/b]1         [b]long[/b]      %00010<<26|%111<<23|1
    [b]frqa[/b]1         [b]long[/b]      $0800_0000
    one1          [b]long[/b]      1
    
                  [b]org[/b]       0
    syncpll_2     [b]mov[/b]       [b]dira[/b],[b]dira[/b]2
                  [b]mov[/b]       [b]ctra[/b],[b]ctra[/b]2
                  [b]mov[/b]       [b]frqa[/b],[b]frqa[/b]2
                  [b]waitpeq[/b]   one2,one2
                  [b]mov[/b]       [b]phsa[/b],#0
    :forever      [b]jmp[/b]       #:forever
    
    [b]dira[/b]2         [b]long[/b]      $0000_0004
    [b]ctra[/b]2         [b]long[/b]      %00010<<26|%111<<23|2
    [b]frqa[/b]2         [b]long[/b]      $0800_0000
    one2          [b]long[/b]      1
    
    
    



    -Phil
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-17 23:11
    Hi Phil,

    Thanks... very weird - I definitely have sync issues. I will ofcourse continue trying to get the code working. I appreciate your help.

    Bill
    Phil Pilgrim (PhiPi) said...
    Bill,

    I wrote the following to see if two 40MHz PLLs could be synced with each other, and it appears that they can. The phase error I'm measuring is a nanosecond or less.

    [b]CON[/b]
    
      [b]_clkmode[/b]      = [b]xtal1[/b] + [b]pll16x[/b]
      [b]_xinfreq[/b]      = 5_000_000
      pin_group     = 0
    
    [b]PUB[/b] start
    
      [b]dira[/b][noparse][[/noparse]*0]~~
      [b]cognew[/b](@syncpll_1, 0)
      [b]cognew[/b](@syncpll_2, 0)
      [b]waitcnt[/b]([b]cnt[/b] +clkfreq)
      [b]outa[/b][noparse][[/noparse]*0]~~
    
    [b]DAT[/b]
    
                  [b]org[/b]       0
    syncpll_1     [b]mov[/b]       [b]dira[/b],[b]dira[/b]1
                  [b]mov[/b]       [b]ctra[/b],[b]ctra[/b]1
                  [b]mov[/b]       [b]frqa[/b],[b]frqa[/b]1
                  [b]waitpeq[/b]   one1,one1
                  [b]mov[/b]       [b]phsa[/b],#0
    :forever      [b]jmp[/b]       #:forever
    
    [b]dira[/b]1         [b]long[/b]      $0000_0002
    [b]ctra[/b]1         [b]long[/b]      %00010<<26|%111<<23|1
    [b]frqa[/b]1         [b]long[/b]      $0800_0000
    one1          [b]long[/b]      1
    
                  [b]org[/b]       0
    syncpll_2     [b]mov[/b]       [b]dira[/b],[b]dira[/b]2
                  [b]mov[/b]       [b]ctra[/b],[b]ctra[/b]2
                  [b]mov[/b]       [b]frqa[/b],[b]frqa[/b]2
                  [b]waitpeq[/b]   one2,one2
                  [b]mov[/b]       [b]phsa[/b],#0
    :forever      [b]jmp[/b]       #:forever
    
    [b]dira[/b]2         [b]long[/b]      $0000_0004
    [b]ctra[/b]2         [b]long[/b]      %00010<<26|%111<<23|2
    [b]frqa[/b]2         [b]long[/b]      $0800_0000
    one2          [b]long[/b]      1
    
    
    



    -Phil
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-17 23:14
    I just had an AHA! moment!!!!!

    I WAS NOT CLEARING PHSA!

    (rookie mistake, not seeing the tree from the forsest)

    That helped, but I am still seeing an offset on the video - but now I have a new path to investigate.

    Update:

    Fixed - just had to move clearing PHSA around to the right spot - now I have them synced!

    THANK YOU - your example program is what showed me how to fix my bug.

    Tonight I will fix both the 1024x768 and 800x600 drivers and start adding plot point/line/character [noparse]:)[/noparse]

    Best,

    Bill
    Phil Pilgrim (PhiPi) said...
    Bill,

    I wrote the following to see if two 40MHz PLLs could be synced with each other, and it appears that they can. The phase error I'm measuring is a nanosecond or less.

    [b]CON[/b]
    
      [b]_clkmode[/b]      = [b]xtal1[/b] + [b]pll16x[/b]
      [b]_xinfreq[/b]      = 5_000_000
      pin_group     = 0
    
    [b]PUB[/b] start
    
      [b]dira[/b][noparse][[/noparse]*0]~~
      [b]cognew[/b](@syncpll_1, 0)
      [b]cognew[/b](@syncpll_2, 0)
      [b]waitcnt[/b]([b]cnt[/b] +clkfreq)
      [b]outa[/b][noparse][[/noparse]*0]~~
    
    [b]DAT[/b]
    
                  [b]org[/b]       0
    syncpll_1     [b]mov[/b]       [b]dira[/b],[b]dira[/b]1
                  [b]mov[/b]       [b]ctra[/b],[b]ctra[/b]1
                  [b]mov[/b]       [b]frqa[/b],[b]frqa[/b]1
                  [b]waitpeq[/b]   one1,one1
                  [b]mov[/b]       [b]phsa[/b],#0
    :forever      [b]jmp[/b]       #:forever
    
    [b]dira[/b]1         [b]long[/b]      $0000_0002
    [b]ctra[/b]1         [b]long[/b]      %00010<<26|%111<<23|1
    [b]frqa[/b]1         [b]long[/b]      $0800_0000
    one1          [b]long[/b]      1
    
                  [b]org[/b]       0
    syncpll_2     [b]mov[/b]       [b]dira[/b],[b]dira[/b]2
                  [b]mov[/b]       [b]ctra[/b],[b]ctra[/b]2
                  [b]mov[/b]       [b]frqa[/b],[b]frqa[/b]2
                  [b]waitpeq[/b]   one2,one2
                  [b]mov[/b]       [b]phsa[/b],#0
    :forever      [b]jmp[/b]       #:forever
    
    [b]dira[/b]2         [b]long[/b]      $0000_0004
    [b]ctra[/b]2         [b]long[/b]      %00010<<26|%111<<23|2
    [b]frqa[/b]2         [b]long[/b]      $0800_0000
    one2          [b]long[/b]      1
    
    
    



    -Phil
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller

    Post Edited (Bill Henning) : 8/17/2009 11:23:20 PM GMT
  • Cluso99Cluso99 Posts: 18,069
    edited 2009-08-18 06:45
    Bill - we may end up replacing that PC yet smile.gif

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    · Prop Tools under Development or Completed (Index)
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    · Search the Propeller forums (via Google)
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  • RaymanRayman Posts: 14,845
    edited 2009-08-18 09:48
    Hmm...· I think this may have been my problem with my 6-bit VGA driver too!
    I just added a phsa=0 line in there and I think it's better now:
    DAT
    '********************************
    '* Assembly language VGA driver *
    '********************************
                            org
    '
    '
    ' Entry                  'First, sync with other vga cogs !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    '
    WaitSync                mov     t1,par    'calculate sync cnt address
                            sub     t1,#4
                            rdlong  cnt2sync, t1  'get sync cnt
                            waitcnt cnt2sync,d8_d4        'sync   'first, sync all cogs to cnt
                            mov     phsa,#0
                            mov     vscl,#1 
                            mov     vcfg,vcfg_ 
                            movi    frqa,#(65 / 5) << 2     'set pixel rate (VCO runs at 2x)                     
                                            'set video shifter to reload on every pixel
                            movi    ctra,#%00001_110        'enable PLLs now - NCOs locked!
                            
                            waitcnt cnt2sync,#0                  'wait ~3ms for PLLs to stabilize - PLLs locked!
                            'mov     phsa,#0
                            'mov     vscl,#100               '<---- Don't do this!!!
    

    Seems to work after the first waitcnt, but not the second...
    The timing appears better now, but one is still 1/2 a pixel off...

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  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-18 13:30
    <insert evil laugh>
    Cluso99 said...
    Bill - we may end up replacing that PC yet smile.gif
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-18 13:32
    Cool!

    Basically I thought that when I initialized CTRA that it would clear PHSA, and Phil's code cured me of that... Chip sent me a code snippet I'll try later that does not need that clearing, I will try it later - but right now I am busy writing some graphics routines for my code!
    Rayman said...
    Hmm... I think this may have been my problem with my 6-bit VGA driver too!
    I just added a phsa=0 line in there and I think it's better now:



    DAT 
    
    '********************************
    '* Assembly language VGA driver *
    '******************************** 
    
                            org
    '
    '
    ' Entry                  'First, sync with other vga cogs !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
    '
    WaitSync                mov     t1,par    'calculate sync cnt address
                            sub     t1,#4
                            rdlong  cnt2sync, t1  'get sync cnt
                            waitcnt cnt2sync,d8_d4        'sync   'first, sync all cogs to cnt
                            mov     phsa,#0
                            mov     vscl,#1  
    
                            mov     vcfg,vcfg_ 
                            movi    frqa,#(65 / 5) << 2     'set pixel rate (VCO runs at 2x)                     
                                            'set video shifter to reload on every pixel
                            movi    ctra,#%00001_110        'enable PLLs now - NCOs locked!
                            
                            waitcnt cnt2sync,#0                  'wait ~3ms for PLLs to stabilize - PLLs locked!
                            'mov     phsa,#0
                            'mov     vscl,#100               '<---- Don't do this!!! 
    
    


    Seems to work after the first waitcnt, but not the second...
    The timing appears better now, but one is still 1/2 a pixel off...
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
  • KyeKye Posts: 2,200
    edited 2009-08-18 15:21
    Wait, so NCO mode works with the video hardware? If that's true thenI could use it to output serial bytes very nicely.

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    Nyamekye,
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-18 15:25
    Sorry, it does not. I ended up going back to PLL, and with Phil's help, solved the problem I was having.

    You can however use APIN with PLL modes, so it could still work for your serial output... look at lonesock et al effort with fsrw for examples.
    Kye said...
    Wait, so NCO mode works with the video hardware? If that's true thenI could use it to output serial bytes very nicely.
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-08-18 15:27
    Bill,

    I think I would set frqa and ctra. Then do a waitcnt for the cogs to sync and the PLL to stabilize. Next, zero phsa right away, then set up your video registers last, once the cogs and PLLs are sync'd.

    -Phil
  • Bill HenningBill Henning Posts: 6,445
    edited 2009-08-18 15:39
    Hi Phil,

    Thank you (again) for your sample code! It allowed me to solve my issue immediately as it was different from Chip's multi-cog driver, which was my drivers inspiration.

    Here is the code I am using right now, and it is rock solid... and similar to your suggestion, however I will try your and Chip's suggestions too smile.gif

    Today I am working on getting a graphics server cog running, initially with just two commands:

    Plot(x,y,c) - plot a specified color pixel
    PutChar(x,y,ch) - draw a character

    Once those work, I will add a lot more:

    Point(x,y) - returns pixel color at that location
    PutStr(x,y,sptr) - print a string
    Line(x1,y1,x2,y2,c) - draw a line, Bresenham's algorithm
    FillRect(x1,y1,x2,y2,c) - draw a filled rectangle

    My goal is to be able to do at least simple graphics and a virtual text mode by the weekend, with a nice font. Once that is done, I can start writing native utilities, code etc., and even more important - run the Largos shell without having to use an external serial terminal!

    Then it is on to 256 color per pixel modes!

                    mov     frqa, frqa_val
                    mov     vcfg,vid_vcfg           'set video configuration
                    mov     vscl,#1
    
                    waitcnt startdelay,#0
    
                    mov     ctra, ctra_val
    
                    waitcnt vcodelay,#0
    
                    mov     vscl,tot_dots
                    mov     phsa, #0
                    waitvid zero,zero     
    
    


    Phil Pilgrim (PhiPi) said...
    Bill,

    I think I would set frqa and ctra. Then do a waitcnt for the cogs to sync and the PLL to stabilize. Next, zero phsa right away, then set up your video registers last, once the cogs and PLLs are sync'd.

    -Phil
    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full
    Morpheus & Mem+dual Prop SBC w/ 512KB kit $119.95, 2MB memory IO board kit $89.95, both kits $189.95
    www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
    Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
  • KyeKye Posts: 2,200
    edited 2009-08-18 15:46
    Bill Henning said...
    Sorry, it does not. I ended up going back to PLL, and with Phil's help, solved the problem I was having.

    You can however use APIN with PLL modes, so it could still work for your serial output... look at lonesock et al effort with fsrw for examples.
    Kye said...
    Wait, so NCO mode works with the video hardware? If that's true thenI could use it to output serial bytes very nicely.
    Eh, pointless because pll modes are just too high speed.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Nyamekye,
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-08-18 16:24
    Kye,

    Don't forget that vscl permits dividing the PLL clock further.

    -Phil
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