Is LMM supported in any way by Parallax ?

Bean · 2009-07-28 13:37

I've been looking on the Parallax site for some LMM info, but I don't see any.

Does Parallax support LMM in any way ?

Do they plan to support LMM in the Propeller IDE ?

Is there a "standard" LMM implementation ?

Bean.

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Does that byte of memory hold "A", 65, $41 or %01000001 ?
Yes it does...

·

Bill Henning · 2009-07-28 14:44

Hi,

>> I've been looking on the Parallax site for some LMM info, but I don't see any.

The most information is in the thread where I announced LMM; I actually have some written docs that I can't publish until after they show up in a magazine.

>> Does Parallax support LMM in any way ?

They added ORGX to the IDE, but it is still extremely painful to write LMM with the IDE

>> Do they plan to support LMM in the Propeller IDE ?

No idea, maybe ask Jeff Martin or Chip

>> Is there a "standard" LMM implementation ?

I defined a minimal implementation when I came up with it, I am working (a bit slowly due to getting Morpheus off the ground) on a "standard" LMM for Largos.

You should check out LAS on my downloads page, it makes writing LMM code easy. There will be a new release of LAS in one to two months, with macro's and the expression evaluator re-enabled.

Bill

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Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
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Ken Gracey · 2009-07-28 14:49

Bean, anything is possible. We have to choose our projects based on priority and resources, of course, but if there's a reason for us to look into LMM support in the IDE we can do that. Is this related to your other thread about BASIC => SPIN compilers?

Ken Gracey
Parallax Inc.

Bean · 2009-07-28 15:03

Ken,
This is not related to the BASIC->SPIN compiler.
I was thinking that LMM was supported by the IDE, but then I couldn't find any info on it. I think I was confused because the C compiler uses LMM.

Bean.

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Does that byte of memory hold "A", 65, $41 or %01000001 ?
Yes it does...

·

Bill Henning · 2009-07-28 16:23

Here's the original thread:

http://forums.parallax.com/showthread.php?p=615022

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Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
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Bean · 2009-07-28 17:07

Bill, thanks for the link. That helps alot.

Almost 2 years old...No wonder I couldn't find it.

Bean.

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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Does that byte of memory hold "A", 65, $41 or %01000001 ?
Yes it does...

·

Bill Henning · 2009-07-28 17:27

You are most welcome...

Yeah, time flies when you are catching your honey, get engaged, and married [noparse]:)[/noparse]

Bean (Hitt Consulting) said...
Bill, thanks for the link. That helps alot.

Almost 2 years old...No wonder I couldn't find it.

Bean.

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Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
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Ale · 2009-07-28 20:56

Bean:

There is also quite a bit of info on LMM on the propeller wiki:

propeller.wikispaces.com/Large+Memory+Model

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OMU for the pPropQL/020 propeller.wikispaces.com/OMU

ImageCraft · 2009-07-28 21:30

The basic LMM idea is pretty simple - once Bill Henning discloses the idea

Here's my blog entry, which still gets lots of hits:

http://imagecraft.wordpress.com/2008/08/27/parallax-propeller-and-the-propeller-c-compiler/

// richard

SamMishal · 2009-07-29 02:56

Hi Bill,

I am going to ask some·question that may be stupid but I am just starting with PASM and
am not up to par with it.....

with this code

nxt···· rdlong·· instr,pc
········ add······pc,#4
instr···nop····· ' placeholder!
········ jmp····· nxt

what happens if the code that is placed in the place holder is a JMP?
How would the code come back to the "Jmp nxt" line·and how would the code
placed in the place holder·that is a JMP itself be executed since its jump location
is not even in the cog in the first place???

Or is it that you are suggesting that only SPECIAL instructions are used to replace Jmp
and other PASM equivalents???

But then how does the code above distinguish these special opcodes from the PASM ones
when the code in the place holder it is executed??

Sam
·

Bill Henning · 2009-07-29 03:11

Hi SamMishal,

Good questions... LMM does not use the normal jumps, except to call functions resident in the kernel.

You can do relative jumps by using sub/add

ie

to jump back: sub pc,#4*numlongsback

to jump forward: add pc,#4*numlongs

also there is a special kernel routine FJMP that uses the long after the instruction for the LMM address to jump to. My assembler automatically uses the regular jump or an FJMP.

Kernel routines continue executing LMM code with a "JMP #NEXT"

You should try LAS - it makes writing LMM code pretty easy, also you may wish to get comfortable with regular PASM before tackling any significant LMM code.

Hope this helps.

Bill

SamMishal said...
Hi Bill,

I am going to ask some question that may be stupid but I am just starting with PASM and
am not up to par with it.....

with this code

<FONT color=blue> add pc,#4

<FONT color=blue> jmp nxt

what happens if the code that is placed in the place holder is a JMP?
How would the code come back to the "Jmp nxt" line and how would the code

placed in the place holder that is a JMP itself be executed since its jump location

is not even in the cog in the first place???

Or is it that you are suggesting that only SPECIAL instructions are used to replace Jmp

and other PASM equivalents???

But then how does the code above distinguish these special opcodes from the PASM ones

when the code in the place holder it is executed??

Sam

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Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full

Mike Green · 2009-07-29 03:12

Instructions that change the flow of control have to be done differently in a LMM. You've already noticed that JMP doesn't work.

For relative jumps close to the current instruction location, you'd use "SUB PC,#xxx" to jump backwards up to 512 bytes (128 instructions) from the following instruction or "ADD PC,#xxx" to jump forwards up to 128 instructions. These can be conditional which is really handy for loops of different kinds or IF statements.

If the jump is further, you'd have to use an LMM interpreter subroutine that would possibly fetch the content of the next word or long and load it into PC or skip it. There are tricks with NOPs where you could embed a 16 or even 18 bit address in a NOP so you could conditionally call an LMM subroutine that would load the address from the least significant 18 bits of the next instruction. If the subroutine call is not executed, the NOP would be skipped as well (with a short delay).

SamMishal · 2009-07-29 03:33

Hi Bill and Mike,

Thanks guys....I now understand.....I am still learning PASM, but this LMM idea is great.

I do not need anything like this at my level....but it is great to know about it and file it
in the back of my mind for the future....of course that is assuming the back of my mind
is still able to hold any memory that far in the future.....I noticed that it is leaking a lot
recently and I have been meaning to fix the leak....but that was filed in the back of my mind....

What was·I talking about????

Seriously......it is a great testament to the design of the propeller that such memory
copying and manipulating makes it possible for such great ideas to be implemented.

I am loving the propeller everyday more and more.

Thanks Bill and everyone who has such a wonderful mind that makes me feel so humble
when I read this forum.....keep up the great work.....

Samuel
P.S. I just had a thought....couldn't a normal PASM program be able to extend itself
to utilize full RAM by just copying chunks of code as needed to fit in the cog RAM?
i.e. similar idea to the LMM but done on chunks basis instead of opcode basis and thus
that way Jmp etc. can still be the same but the code "chunks" have to be designed
with care to inter-chunks looping?????
·

Mike Green · 2009-07-29 03:39

Some of Bill's LMM kernels and (I think) the ImageCraft kernel have provisions for copying hunks of code into specific buffers in cog RAM where they can be executed. One of the kernels had several buffers for this sort of code hunk intended more for having several routines resident at the same time, but these could be used together to allow for a larger hunk. There's nothing special about the code to be copied into the cog.

Bill Henning · 2009-07-29 03:42

You are most welcome

Yes, it would be possible to make a "paging" cog, and I believe some people have tried it (Ale? Mike? Phil?) however my gut feeling is that LMM would be faster overall (at least if you also use FCACHE and unroll the inner loop of the kernel four ways); the reason is that paging the cog code would be slower for "in-line non-looping code" because even with an optimal reverse loading, it would take 16 cycles to fetch each long, and four (or more) cycles to execute it - whereas a four-way unrolled LMM kernel averages in-line instructions in 18 clock cycles - 10% faster. On the other hand, paging loads loops faster than the current FCACHE... win some, lose some.

Best,

Bill

SamMishal said...
Hi Bill and Mike,

Thanks guys....I now understand.....I am still learning PASM, but this LMM idea is great.

I do not need anything like this at my level....but it is great to know about it and file it
in the back of my mind for the future....of course that is assuming the back of my mind
is still able to hold any memory that far in the future.....I noticed that it is leaking a lot
recently and I have been meaning to fix the leak....but that was filed in the back of my mind....

What was I talking about????

Seriously......it is a great testament to the design of the propeller that such memory
copying and manipulating makes it possible for such great ideas to be implemented.

I am loving the propeller everyday more and more.

Thanks Bill and everyone who has such a wonderful mind that makes me feel so humble

when I read this forum.....keep up the great work.....

Samuel

P.S. I just had a thought....couldn't a normal PASM program be able to extend itself
to utilize full RAM by just copying chunks of code as needed to fit in the cog RAM?

i.e. similar idea to the LMM but done on chunks basis instead of opcode basis and thus

that way Jmp etc. can still be the same but the code "chunks" have to be designed

with care to inter-chunks looping?????

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www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full

Cluso99 · 2009-07-29 04:29

See my overlay loader for loading code blocks into cogs. (listed in the "tools" thread in my signature)

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Bean · 2009-07-30 00:06

Just so I know I'm on the right track, does this look okay ?
It seems to run on the Prop demo board (flashes all the LEDs).

''***************************************
''*  Propeller LMM Experiments          *
''*  Author: Terry Hitt                 *
''***************************************
CON
  _ClkMode = xtal1 + pll16x
  _XInFreq = 5_000_000

PUB Main
  CogNew(@LMM_Entry, @My_LMM_Code)

DAT
  ORG 0
' -------------------------------------------------------------------------------------------
' LMM Program  
' -------------------------------------------------------------------------------------------
My_LMM_Code
    OR DIRA,Mask ' Make pin an output
    MOV Wait,CNT ' Setup wait variable
    ADD Wait,Delay

Again
  OR OUTA,Mask        ' Make pins high
  WAITCNT Wait,Delay  ' Delay
  ANDN OUTA,Mask      ' Make pins low              
  WAITCNT Wait,Delay  ' Delay                 
 
  RDLONG PC,PC        ' Prepare for far jump
  LONG @Again         '   Address for Far jump (#Again)
 
DAT
' -------------------------------------------------------------------------------------------
' LMM Execution code 
' -------------------------------------------------------------------------------------------
  ORG 0
LMM_Entry
  MOV PC,PAR

 
nxt
  RDLONG instr,PC
  ADD PC,#4

 
instr
  NOP   ' Placeholder for LMM instruction
  JMP #nxt            
 
' Variables for LMM execution code

PC     LONG 0  ' Program counter
 
' Constants/Variables for My_LMM_Code
Mask   LONG %0000_0000_1111_1111_0000_0000_0000_0000
Delay  LONG 4_000_000
 
' Variables for My_LMM_Code
Wait   RES 1

Bean

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Does that byte of memory hold "A", 65, $41 or %01000001 ?
Yes it does...

·

RossH · 2009-07-30 00:24

@Bean,

Basically ok. But the way you do the FAR jump means you couldn't have any code after the jump - which is ok for unconditional jumps, but wouldn't work in conditional cases. To do that you need to call a function built into the kernel (i.e. what you call the "LMM Execution code"). For an example, see any of the LMM or XMM Kernels in the Catalina source code. Or Bill's original LMM code.

Ross.

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Catalina - a FREE C compiler for the Propeller - see Catalina

Bill Henning · 2009-07-30 00:38

Basically what Ross said - except there is an easy optimization:

- instead of RDLONG PC,PC with a LONG address following, your loop is small enough for

SUB PC,#20 ' five longs back which saves a long of memory and some cycles [noparse]:)[/noparse]

and actually as long as 18 bits of address is enough, by setting the upper fourteen bits of the LONG following the RDLONG PC,PC it would be treated as a NOP if executed due to conditions being placed on the RDLONG

Bean (Hitt Consulting) said...
Just so I know I'm on the right track, does this look okay ?
It seems to run on the Prop demo board (flashes all the LEDs).

''***************************************
''*  Propeller LMM Experiments          *
''*  Author: Terry Hitt                 *
''*************************************** 

CON
  _ClkMode = xtal1 + pll16x
  _XInFreq = 5_000_000 


PUB Main
  CogNew(@LMM_Entry, @My_LMM_Code) 


DAT
  ORG 0
' -------------------------------------------------------------------------------------------
' LMM Program  
' -------------------------------------------------------------------------------------------
My_LMM_Code
    OR DIRA,Mask ' Make pin an output
    MOV Wait,CNT ' Setup wait variable
    ADD Wait,Delay 


Again
  OR OUTA,Mask        ' Make pins high
  WAITCNT Wait,Delay  ' Delay
  ANDN OUTA,Mask      ' Make pins low              
  WAITCNT Wait,Delay  ' Delay                  

  

  RDLONG PC,PC        ' Prepare for far jump
  LONG @Again         '   Address for Far jump (#Again) 

  

DAT
' -------------------------------------------------------------------------------------------
' LMM Execution code 
' -------------------------------------------------------------------------------------------
  ORG 0
LMM_Entry
  MOV PC,PAR
 

  

nxt
  RDLONG instr,PC
  ADD PC,#4
 

  

instr
  NOP   ' Placeholder for LMM instruction
  JMP #nxt             

  

' Variables for LMM execution code
 

PC     LONG 0  ' Program counter 

  

' Constants/Variables for My_LMM_Code
Mask   LONG %0000_0000_1111_1111_0000_0000_0000_0000
Delay  LONG 4_000_000 

  

' Variables for My_LMM_Code
Wait   RES 1

Bean

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Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
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Post Edited (Bill Henning) : 7/30/2009 12:46:17 AM GMT

Bean · 2009-07-30 01:27

RossH said...
@Bean,

Basically ok. But the way you do the FAR jump means you couldn't have any code after the jump - which is ok for unconditional jumps, but wouldn't work in conditional cases. To do that you need to call a function built into the kernel (i.e. what you call the "LMM Execution code"). For an example, see any of the LMM or XMM Kernels in the Catalina source code. Or Bill's original LMM code.

Ross.

Ross,
· The LONG data will always be less than 18 bits, so the condition code will be 0000 which means NEVER execute. So I don't see why it would matter if the RDLONG PC,PC had a condition or not ?

Bill,
· Yes I see what you mean.

I tried to find the LMM execution code, but I could find it in either LAS or Catalina. In a way I'm trying NOT to see how other have done it. If I find another way, it might spark further development.

Bean.

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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Does that byte of memory hold "A", 65, $41 or %01000001 ?
Yes it does...

·

RossH · 2009-07-30 03:26

@Bean,

That's true if you are limiting yourself to 256Kb - but you already need at least 20 bits to address most XMM memory currently available (some require up to 24 bits).

The LMM execution code in Catalina is in the kernel files, which are in the target directories - e.g. LMM_Kernel.spin. But I can understand you may not want to be influenced by what others have done and instead develop your own solution.

Ross.

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Catalina - a FREE C compiler for the Propeller - see Catalina

Bill Henning · 2009-07-30 03:48

Actually, if the long is shifted left two bits, it could address 1MB - after all, we can safely assume instructions should be long aligned...

RossH said...
@Bean,

That's true if you are limiting yourself to 256Kb - but you already need at least 20 bits to address most XMM memory currently available (some require up to 24 bits).

The LMM execution code in Catalina is in the kernel files, which are in the target directories - e.g. LMM_Kernel.spin. But I can understand you may not want to be influenced by what others have done and instead develop your own solution.

Ross.

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full

RossH · 2009-07-30 03:52

Hi Bill,

Yes, I had I thought of that - but most memory is byte addressable, and having to shift the address on every fetch doesn''t seem like a good solution.

I was going to modify the Hydra Xtreme to make it long addressable to overcome the original 64k addressing limitation, but in the end I didn't because epmoyer had already made it fully byte addressable - but it takes 19 bits.

Ross.

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Catalina - a FREE C compiler for the Propeller - see Catalina

Bill Henning · 2009-07-30 04:29

And thus "Medium Model" is born... 256KB code, 256KB data, 256KB stack&heap...

RossH said...
Hi Bill,

Yes, I had I thought of that - but most memory is byte addressable, and having to shift the address on every fetch doesn''t seem like a good solution.

I was going to modify the Hydra Xtreme to make it long addressable to overcome the original 64k addressing limitation, but in the end I didn't because epmoyer had already made it fully byte addressable - but it takes 19 bits.

Ross.

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full

RossH · 2009-07-30 04:56

Hi Bill,

Is this going to be a Largos model? Interesting - I've pretty much decided that the next model Catalina will support will be 16Mb combined code/data/heap - but only 32kb stack. This is by far the simplest model to implement, but it's not (well, not entirely) just laziness on my part - for frame-based procedural languages it is also likely to be the fastest model, since these languages (like C) need fast access to the stack because that's where all the local variables are.

This will still be a bit limiting on the Prop I, but the Prop II it will become 16Mb/256Kb which will work out quite well.

Ross.

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Catalina - a FREE C compiler for the Propeller - see Catalina

Phil Pilgrim (PhiPi) · 2009-07-30 05:14

You can gain five address bits for conditional jumps by setting bit 31 of the long jump target address. This converts the "instruction", if the jump isn't taken, to an add d,s nr or add d,#s nr which doesn't do anything, even if its "condition" allows it to be executed. The timing isn't affected either. The external addressing logic will have to ignore bit 31 for this to work, but it's probably not being used anyway.

-Phil

Post Edited (Phil Pilgrim (PhiPi)) : 7/30/2009 5:21:21 AM GMT

RossH · 2009-07-30 05:26

Phil,

That's just too darned clever! I feel sorry for all those people who may one day try to read the resulting code to try to figure out what the heck is going on!

Ross.

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Catalina - a FREE C compiler for the Propeller - see Catalina

Cluso99 · 2009-07-30 07:15

Nice one Phil

23bits = 8MB

Of course the fetch mechanism will be different for XMM. Not sure of the impact if the rdlong has bit 31 set (for hub fetching).

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Links to other interesting threads:

· Home of the MultiBladeProps: TriBladeProp, RamBlade, TwinBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: Micros eg Altair, and Terminals eg VT100 (Index) ZiCog (Z80), MoCog (6809)
· Search the Propeller forums (via Google)
My cruising website is: ·www.bluemagic.biz·· MultiBladeProp is: www.bluemagic.biz/cluso.htm

Post Edited (Cluso99) : 7/30/2009 7:20:26 AM GMT

Bill Henning · 2009-07-30 12:40

Very cool trick Phil!

Phil Pilgrim (PhiPi) said...
You can gain five address bits for conditional jumps by setting bit 31 of the long jump target address. This converts the "instruction", if the jump isn't taken, to an add d,s nr or add d,#s nr which doesn't do anything, even if its "condition" allows it to be executed. The timing isn't affected either. The external addressing logic will have to ignore bit 31 for this to work, but it's probably not being used anyway.

-Phil

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full

Bill Henning · 2009-07-30 12:51

Hi Ross,

While I'd prefer a clean 32 bit linear address space, I really like Phil's trick which allows conditional jumps/loads/calls in an 8MB space.

I REALLY like Catalina supporting a 16MB flat space with only the stack in the hub - don't change that plan! It would let me use Catalina to compile a "native" version of LAS, and hopefully Catalina!

What I was going to do if the jump was not in ADD/SUB PC range:

if_NOTcond ADD PC,#8
RDLONG PC,PC
LONG addr

Now life will be more complicated, but better - birds will sing, the sun will shine, and everyone (except compiler writers) will be happy:

if address is within +- 128 longs
add/sub pc,#offset

if address is within first 8MB of expanded memory space:

if_cond RDLONG PC,PC
LONG $80000000+addr+condition_code

if address > 8MB

if_NOTcond ADD PC,#8
RDLONG PC,PC
LONG addr

However before compiler writers shoot me, please be advised that next version of LAS will make above totally transparent, just requiring the following in the code:

if_cond JMP #address

If the address is already known, it will generate the optimal jump, if it is not know, it will default to the two-long trick version; it will need an option to use the three word version.

LAS is a one pass assembler, so it does not know until the destination label is defined how many longs it would need to use to reach it.

RossH said...
Hi Bill,

Is this going to be a Largos model? Interesting - I've pretty much decided that the next model Catalina will support will be 16Mb combined code/data/heap - but only 32kb stack. This is by far the simplest model to implement, but it's not (well, not entirely) just laziness on my part - for frame-based procedural languages it is also likely to be the fastest model, since these languages (like C) need fast access to the stack because that's where all the local variables are.

This will still be a bit limiting on the Prop I, but the Prop II it will become 16Mb/256Kb which will work out quite well.

Ross.

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www.mikronauts.com - my site 6.250MHz custom Crystals for running Propellers at 100MHz
Las - Large model assembler for the Propeller Largos - a feature full nano operating system for the Propeller
Morpheus & Mem+ Advanced dual Propeller SBC with XMM and 256 Color VGA
Please use mikronauts _at_ gmail _dot_ com to contact me off-forum, my PM is almost totally full

Post Edited (Bill Henning) : 7/30/2009 12:56:40 PM GMT

ericball · 2009-07-30 16:56

I did some thinking about LMM a while back.· So I'll throw out what I did here just in case it might be of use to someone.

' reverse Large Memory Model (HUB RAM)
COGSTART( @LMM_PC, @start )
 
LMM_PC  MOV LMM_PC, PAR ' register 0 is PC for ease of reference by LMM code
LMM_resume ANDN LMM_PC, #3 ' fix PC (if necessary), JMP #1 returns to LMM code
  JMP #LMM_start
:1  NOP
  RDLONG :2, PC
  SUB PC, #7
:2  NOP
LMM_start RDLONG :1, PC
  DJNZ PC, #:1
 
The following PASM instructions are not compatible with LMM code because they change the COG PC rather than LMM_PC: JMPRET, DJNZ, TJNZ, TJZ
 
Short relative branches may be performed via ADD/SUB instructions:
 IF_COND ADD 0, [url=mailto:#@dest]#@dest[/url] - @source ' backwards branch
 IF_COND SUB 0, [url=mailto:#@source]#@source[/url] - @dest ' forward branch
 
JMP (and DJNZ, TJNZ, TJZ) may be used to invoke LMM subroutines:
  JMP #LMM_sub1 ' call LMM_sub1
 
LMM_sub1 <code>
  JMP #LMM_resume
 
' LMM long jump
  LONG @jmpdest-@start ' for long jump, offset is long before (after in reverse) jump instruction

 IF_COND JMP #LMM_jmp ' call long jump
 
LMM_jmp  RDLONG LMM_PC, LMM_PC ' fetch offest from @start
  ADD LMM_PC, PAR ' add @start
  JMP #LMM_start
 
' LMM DJNZ
  WORD register
  WORD @jmpdest-@source-4
@source  JMP #LMM_djnz
 
LMM_djnz RDLONG LMM_temp, LMM_PC
  MOVD :1, LMM_temp
  SUB LMM_temp, #4
:1  DJNZ LMM_temp+0, #:2
  JMP #LMM_resume
:2  ASR LMM_temp, #16
  ADD LMM_PC, LMM_temp
  JMP #LMM_resume
 
Also, any instructions used to modify other instructions are not valid, i.e. MOVD.  Since these instructions are typically used for indirect addressing (i.e. table lookup) subroutines may be used to implement this function, either directly or indirectly.
 
' Copy register to register (direct source & destination)

  JMP #LMM_movsd
  MOVD LMM_movsd, #DstReg
  MOVS LMM_movsd, #SrcReg
 
LMM_movsd MOV 0, 0
  JMP #LMM_resume
 
' MOV indirect source to indirect destination
  WORD SrcReg
  WORD DstReg
  JMP #LMM_indcpy
 
LMM_indcpy RDLONG LMM_temp, PC
  MOVS :1, LMM_temp
  SHR LMM_temp, #1
  MOVD :1, LMM_temp
  SUB PC, #4
:1  MOV 0, 0
  JMP #LMM_resume
 
LMM subroutines could also be used to handle application specific requirements, i.e. stack / heap functionality.

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Post Edited (ericball) : 7/31/2009 6:15:28 PM GMT

Is LMM supported in any way by Parallax ?

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