Propeller and FPGA
Jay Kickliter
Posts: 446
Has anyone put a Prop (physical, not soft core) and an FPGA on the same board? Even with 8 cores, I can imagine that it might be beneficial to have an FPGA to offload some intensive tasks. I'm very new to FPGAs so I really don't know what I'm talking about. But I've seen boards with other microcontrollers on them.
Comments
I do not see any reason why the Propeller could not be interfaced to
and FPGA....but you do have to consider the voltage levels....5V or 3.3V or...
Sam
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Though IMO a CPLD such as the MAXII would be easier to hookup to since they are 3.3v devices like the Prop.
I've did a comunication between a prop chip and a Cyclone II from Altera.
The prop catch the data from ethernet, and pass that data to the FPGA, who controlls a led module at very high refresh speed.
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Regards.
Alberto.
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Visit the home of pPropQL: propeller.wikispaces.com/pPropQL
pPropQL020: propeller.wikispaces.com/pPropQL
OMU for the pPropQL/020 propeller.wikispaces.com/OMU
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The engine is a Toyota 22RE (4-cyl) with a 0-30psi variable speed blower, larger injectors, coil-on-plug ignition (distributor-less), and an active exhaust system.· So far I can squeeze out about·80HP/cylinder, I’m hoping that with tuning and a few more mods I can get up to 95HP/Cyl for 1 hour duration.
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Oh, and it should pass 2009 emissions…
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It's a good way to do things if you have several time-critical capture activities that need to be pipe-lined, a CPLD can run easily in the >100MHz range based on inputs and you can lay out what would be a very complex discreet logic circuit so that things are more event driven.· The portion of engine management that isn't easy to do in CPLD (or at least is very gate expensive) is arithmetic.· This is something the Propeller can do fast enough (with a stripped down IEEE 754 float library).· It also allows for faster/easier (an again less gate expensive) external memory interfaces when using the Prop to do configuration.
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The design security is also nice in a CPLD/FPGA – since I’m doing a lot of hand-routed logic, I don’t want to have it copied.· Setting the appropriate security bits keeps the configuration from being read out.
Edit: Forgot to mention·an SX48 is running the memory itself - there is a 4Mb Parallel FRAM and a 4Mb SRAM readable over·two SPI-like interfaces (separate RX/TX).· FRAM holds data·during power-down/sleep, and loads data into the SRAM as it is called, then·takes un-used time to copy the rest of the FRAM to SRAM (SRAM is still faster than FRAM - for now). -T
Post Edited (GreyBox Tim) : 7/16/2009 7:06:07 PM GMT
But I ran out of free time - too many othe projects I haven't finished yet... maybe someday.
-Tim