mixing SPI and I2C
Chad George
Posts: 138
So I'm working on a design that has a 4 wire SPI bus already, but one of the devices I want to use is I2C.
The only extra data line available was going to be CS...but its directly connected to the Prop so I can use it for data...but thats all I have available.
So I need to "share" one of the I2C bus lines with my SPI bus.
The question is which is better to have on its own SCL or SDA?
I'm currently thinking of putting SDA on the CS line with a pullup resistor...and having SCL be the SPI CLK line (actively driven both high and low)
**edit** actually maybe I should put a pullup on this line too so the I2C device can do clock streching when I'm talking to it
My limited knowledge of I2C spec leads me to believe if I never do any SDA transitions during SPI traffic then the I2C chip won't really care. And certainly the SPI devices won't care about the I2C traffic since they all have dedicated CS pins.
Does this seem like a reasonable approach? Does anyone have experience doing this? Is this better than sharing the SDA line with ...say... MISO?
Also any idea on what happens if the shared clock line exceeds the I2C devices rated clock speed during SPI transactions?
The only extra data line available was going to be CS...but its directly connected to the Prop so I can use it for data...but thats all I have available.
So I need to "share" one of the I2C bus lines with my SPI bus.
The question is which is better to have on its own SCL or SDA?
I'm currently thinking of putting SDA on the CS line with a pullup resistor...and having SCL be the SPI CLK line (actively driven both high and low)
**edit** actually maybe I should put a pullup on this line too so the I2C device can do clock streching when I'm talking to it
My limited knowledge of I2C spec leads me to believe if I never do any SDA transitions during SPI traffic then the I2C chip won't really care. And certainly the SPI devices won't care about the I2C traffic since they all have dedicated CS pins.
Does this seem like a reasonable approach? Does anyone have experience doing this? Is this better than sharing the SDA line with ...say... MISO?
Also any idea on what happens if the shared clock line exceeds the I2C devices rated clock speed during SPI transactions?
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I have an expansion header on an existing product. I originally intended on it using an SPI interface so the lines going to the expansion board are CLK, MOSI, MISO, CS1, CS2.
The spi bus is shared with other parts (A/D converter) on the main board.
On my new expansion board I'm going to have an I2C I/O expander and an SPI D/A converter.
The D/A converter is dead easy.. CLK, MOSI, CS1
The question is how to best hookup the I2C part to the existing SPI bus.
The plan currently is to use the CS2 line for SDA, and the CLK for SCL. My understanding of I2C is that if I never toggle SDA during SPI comms then the I2C device will never see a START/STOP signal and will happily ignore the SPI CLK changing.
I could probably even use MOSI for SDA if I write the SPI code carefully, but since I have a CS signal available I thought it was easier to isolate one of the two I2C lines from the SPI bus.
Of course the easiest option is to use a separate line for both SCL and SDA, but that is not physically an option this time.
I was interested if anybody has successfully done this before?
Post Edited (Chad George) : 6/19/2009 8:03:38 PM GMT
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