Memory Expansion
mallred
Posts: 122
Hi,
This is my first post on these forums.·
I am very excited about the Parallax Propeller and its potential.·
I work with Dr. James Gouge.· He has designed, prototyped, and thoroughly tested a 2MB static ram expansion that can be daisy chained up to eight times per Parallax Propeller Proto board.· We used the proto board because of the eurocard form factor.
He has also created a way to link an indefinite number of propeller proto boards together, thus allowing for an indefinite amount of very fast SRAM to be directly addressed from ANY COG in the system.
Dr. Gouge cut his teeth in the mainframe world.· He is bringing the ideas of the mainframe to the parallax propeller now.
His reason for creating this platform is to be able to port his cognitive research onto the platform.· He aims to create the world's first cognitive android.· This will be like a child and will have to learn as it goes.
He has been introduced in Robot magazine this past issue, and will have a feature article about him and his goals in the coming issue.
This is very exciting for robot/android enthuseists.· It will give us the room to do big things.· Just think what you could create with a platform of unlimited COGs and unlimited memory.· It's time to do something BIG!
Thanks,
Mark Allred
Vice President
Machine Intelligence Technologies
http://www.machineinteltech.com
This is my first post on these forums.·
I am very excited about the Parallax Propeller and its potential.·
I work with Dr. James Gouge.· He has designed, prototyped, and thoroughly tested a 2MB static ram expansion that can be daisy chained up to eight times per Parallax Propeller Proto board.· We used the proto board because of the eurocard form factor.
He has also created a way to link an indefinite number of propeller proto boards together, thus allowing for an indefinite amount of very fast SRAM to be directly addressed from ANY COG in the system.
Dr. Gouge cut his teeth in the mainframe world.· He is bringing the ideas of the mainframe to the parallax propeller now.
His reason for creating this platform is to be able to port his cognitive research onto the platform.· He aims to create the world's first cognitive android.· This will be like a child and will have to learn as it goes.
He has been introduced in Robot magazine this past issue, and will have a feature article about him and his goals in the coming issue.
This is very exciting for robot/android enthuseists.· It will give us the room to do big things.· Just think what you could create with a platform of unlimited COGs and unlimited memory.· It's time to do something BIG!
Thanks,
Mark Allred
Vice President
Machine Intelligence Technologies
http://www.machineinteltech.com
Comments
I thought the consensus was that we end up with a huge memory accessed through a low bandwidth bus. The speed of the Prop gets wasted.
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For me, the past is not over yet.
It's against forum rules to post duplicate messages.
The RAM might be fast but I fail to see how the access can be. Sounds too good to be true.
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For me, the past is not over yet.
I can generate gerber files and have it made into boards for less money (and time).
I wish Dr. George luck in his project. I think the code might be interesting.
Also, there is the wirewrapping we have to do to prep the original Propeller Proto board to be able to interface with our memory module(s).· Can't get around that unless Parallax decides to reprint boards.
Thanks,
Mark
Post Edited (mallred) : 5/5/2009 4:48:01 PM GMT
With the new cost of the Propeller, this would be much easier than wirewrapping.
Mark
Post Edited (mallred) : 5/5/2009 6:49:31 PM GMT
The Proto board isn't Eurocard (100 mm x 160 mm)!
Leon
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Amateur radio callsign: G1HSM
Suzuki SV1000S motorcycle
This is Dr. Gouge. I would like to respond to some of your technical concerns regarding our SRAM memory expansion cards.
You do not execute programs directly from the expansion memory. This would be a waste of bandwidth. Instead, the design is optimized for block memory transfers to facilitate efficient loading of overlays into any propeller/COG attached to the bus where the expansion memory resides. In other words, you execute in the COG, not in the expansion memory. Why bother adding memory if you are going to waste the bandwidth?
The block transfers only require 2 I/O instructions for each byte transferred.
Cog memory is very limited (2K) and some of that has to be used for data. Doing overlays is one way of helping, but the small memory size limits functionally what can be accomplished. It's probably much better to overlay from hub memory with the most often used overlays kept there and less frequently used overlays stored in expansion memory.
Are you planning on using the LOCKxxx mechanism for multiprocessor access to a common memory expansion pool? What about multiple Propellers sharing the expansion memory?
The memory interface is a latch including a counter. So, once the memory adress is set, you let counter A generate a clock and all the code has to is to get the data from the bus.
I'm currently thinking on such an memory interface as well .. to be done in a CPLD. But mine won't cost thousands of dollars ;o) Estimated cost for people who can do such hardware stuff by themselves:
$5 for the CPLD and $5 per 512kB for the RAM - don't have experiences with companies that deliver custom PCBs yet, but there is still plenty of room left before I reach the $1k watermark. Up to 2GB is possible.
The question I have for Dr. Jim is:
You mentioned 5MB/sec transferrate, but how fast will it be effectively when you really have random access per 256 bytes, so when we include the adress setup time into the calculation?
Post Edited (MagIO2) : 5/6/2009 8:52:54 AM GMT
that is pretty much what I have done with my propmod. 1x1" or 2x0.8"
http://forums.parallax.com/forums/default.aspx?f=15&m=341159
my prop galore project is 8 props with 10bit bus and 19 free io. that is going to the pcb manufacturer this week.
@MagIO2 I like the idea of using a CPLD have no experience with CPLDs but lots with custom PCB can help if you like.
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Need to make your prop design easier or secure? Get a PropMod has crystal, eeprom, and programing header in a 40 pin dip 0.7" pitch module with uSD reader, and RTC options.
@Mallred - You were starting to sound like a snake oil salesman's front man there. "Behold the great and powerful OZ!" If you are genuinely interested in the Propeller, and microcontrolled projects, Welcome! Glad to meet you. If you are a "marketing professional", take a hike.
A system of interconnected Propeller boards: This thread addresses memory, interprop communication, and timing issues, among others.
http://forums.parallax.com/forums/default.aspx?f=25&m=343952
Six "Blade" Prop: This thread describes the development of a six Propeller single board computer with some predefined functionality (Cluso99, please feel free to add to that description)
http://forums.parallax.com/forums/default.aspx?f=25&m=323449&p=1
Ned
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"They may have computers, and other weapons of mass destruction." - Janet Reno
On target comments ... Not being critical: Taking a hike is good exercise, but everyone as you know of course has the right to post here within forum rules. One item to consider: If you don't reinvent the wheel, you can not expand your intellectual property portfolio [noparse]:)[/noparse]
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--Steve
Propalyzer: Propeller PC Logic Analyzer
http://forums.parallax.com/showthread.php?p=788230
Slightly more seriously, the internet "social scene" (blogs, networking sites, fora) has recently become a major target for marketing types, and I cannot express how sick I am of how every aspect of our lives must be perverted into some form of marketing tool.
Careful, I'm stepping down from my soap box now, and might trip.
Of course, the wheel having been invented more than 20 years ago, in the U. S. at least, anyone re-inventing it would not have to pay royalties to Thag, its original inventor.
Ned
Edit: In my comments about marketing I do not mean all the folks who are a part of this community who have created Propeller related products. I am talking about people who see everyone as nothing more than a consumer.
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"They may have computers, and other weapons of mass destruction." - Janet Reno
Post Edited (WNed) : 5/6/2009 7:42:33 PM GMT
I'm with you, I pretty much hate sales types, but I do live in a capitalist society.
BTW, I just love your sig line.
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--Steve
Propalyzer: Propeller PC Logic Analyzer
http://forums.parallax.com/showthread.php?p=788230
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Yours in continuing machine intelligence research,
Dr. Jim
http://www.machineinteltech.com
support@machineinteltech.com
The address setup only has to be done once for each block transferred and therefore has a negligible effect on the bandwidth, 1 per block. For instance, if the block size is 256 bytes, the address setup requires 6 I/O instructions, then the generalized effect would be and additional 6 instructions for each block.
In block transfer mode, the address setup time adds minuscule time on a per byte transfer. However, if it is used in byte random access mode, which is an extremely poor use of the resource, then the additional 6 I/O instructions would then add to the two I/O instructions needed for a single byte transfer, culminating in eight bytes per block transferred.
The resource is used to store blocks of data and overlays which are blocks as well. Therefore, it is a very good tradeoff for 12 I/O pins for the bus, eight for data and four for control, leaving 20 I/O pins for whatever use the user chooses.
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Yours in continuing machine intelligence research,
Dr. Jim
http://www.machineinteltech.com
support@machineinteltech.com
In summary there are two 8 bit latches that hold the top 16 bits of the 24 bit address bus, two 4 bit synchronous up/down counters that provide the bottom 8 bits and are clocked by the memory chip select signal and some classic address decode logic from the 'good old days'. This allows the software to read 256 bytes without writing to latches. Is this the basis of the product offered?
(The content of this post may be mistaken as confrontational/offensive/insulting. I intend none of these and welcome you to this very pleasant forum community.!!)
I started this post first, then moved the conversation over to the ongoing post about my company. I posted this over there, but it encapsulates my intent. You can decide whether or not I am a greasy-haired used car salesman. Ultimately, what you think of me matters very little. It's what you DO, and I believe, how you treat others, that matters.
"It is a new day.
I just want to say to this forum that I was hoping to have a conversation with you about what our company is doing/proposing. You started a thread about my company and therefore I thought you would be pleased to have a friendly chat with those of us who are creating something. It is obvious you are interested in it or the thread would not exist.
My thought for the future is, let us have that conversation. We got buried yesterday in everything but real conversation. It can be conceptual first, then at a technically detailed level later. There should be no restriction about the approach. This way, those who are not as technically proficient as some of you might be, will have a chance to understand and participate.
We want you to know that we think the Propeller is an excellent microcontroller, which is why we chose it for our platform. We are doing something with it, we have products and a website, which is why the thread was started in the first place. We started our endeavors in January 2009, so we are not yet polished, yet you sought us out. I was only trying to be a part of the conversation about us.
So, let's have some intelligent communication about the Propeller. That's what I was expecting, and that is what I wish to be a part of.
Onward and upward gentlemen,"
Mark
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Need to make your prop design easier or secure? Get a PropMod has crystal, eeprom, and programing header in a 40 pin dip 0.7" pitch module with uSD reader, and RTC options.
But perhaps we all need to be 'announced': Paging Doctor Acula, Paging Doctor Acula...
This has got me thinking, and it has got me thinking in a very technical way, so I need to thank machineintelligence for that. For true random access over a large sram, eg 512k, you might use dedicated lines for all address and data lines. That doesn't leave many prop pins free. But often one is reading in data in blocks. For FAT I think the blocks are 512 bytes. For CP/M the blocks are 128 bytes (different names are used, sectors, or records etc). So if you latch in the higher bytes, and then set up a counter for, say, the bottom 8 bits, it could well end up faster but with no decrease in performance due to not being totally random. For a totally CP/M disk optimised solution, one would use 7 bits and a 7 bit counter. But I'm not sure about the 64k of working ram - most code does stay in a 128 byte group so one could think about caching. But not so useful when a program executes at 0100H and then does a BIOS call to CP/M sitting up at FD00H.
Then one could look at the cost of, say, dedicated chips such as the 4024 or 4020 (? their HC variants), vs a latch for those bottom bits.
I might delve into the depths of heater's z80 code and look at how much time it would cost to address latches vs counters. Counters would need to be reset for instance, to be sure they don't get out of synch and that takes another line. Then again, what would you do with the pins you save? Do you free enough pins to enable address to lots of memory and still allow vga, tv, keyboard and a serial port? Possibly not, so having brainstormed this, I seem to be coming to a design that is the same as cluso's triblade...
Post Edited (Dr_Acula (James Moxham)) : 5/7/2009 12:15:42 AM GMT
I reiterate: "If Since you are genuinely interested in the Propeller, and microcontrolled projects, Welcome! Glad to meet you."
Ned
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"They may have computers, and other weapons of mass destruction." - Janet Reno
Post Edited (WNed) : 5/7/2009 12:24:16 AM GMT
BTW - Hanno started a new high speed mem access thread you should read through: http://forums.parallax.com/forums/default.aspx?f=25&m=349679
... and by the time you read this, you probably will have.
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"They may have computers, and other weapons of mass destruction." - Janet Reno
A lot of synchronous up/down counter chips have an async parallel load function where you can latch a new value into them, so you can use them as latches as well. It's therefore possible to latch in an address other than 0 so if you used 4 4-bit counters for instance you could use them as two 8 bit latches but you could also do 512 byte block transfers without a latch configuration in the middle of the process.
Dunno about 4024, but the 4020 is a ripple counter isn't it? Will that be fast enough? 74HC191 or 74HC161 will clock at up to 40MHz ish as they are synchronous counters and have the parallel load I mentioned.
Fact:
If you want to devote 24pins of the prop·(14 for address, 8 for byte data·and 2 clk signals)
you could get fast access to any single ram·byte address position at any time.
If you·use a·latch (serial to parallel shift register) for the higher·8 bits of the address, that uses 2 pins
You are now down to 18 pins.
You would now have random access to within the limits·of insides·64byte blocks.
But if we turn this on it's head·were we·have NO random access to the lower bits
but are forced to read/write it in 1024byte blocks.
And with the use of external counters we are getting a·burst mode.
each 1kb·would be bursted in to the cogs RAM.
1MB RAM expansions·would use 2pins·prop pins·for the higher address latched with 10bit serial-to-parallel,
and 8 pins for data plus·2 or 3 pins for sync/reset.
total: 12 or 13 pins