Using Video Generator as Port Expander
MagIO2
Posts: 2,243
Don't know if someone already did that, but I thought it's a nice task for the not used video generators.
The generator shifts out the bits into a shift register. Currently I only have a 74LS322 at hand which has a max. clock frequency of 30MHz. But there are shift registers which could deal with the max. PLL clock frequency of the prop (120MHZ).
On prop-side only 3 pins are needed and that way the port can be expanded by up to 31 port-pins (output only of course). But that's really nice for some Chip-Selects ... or for driving lots of LEDs ...
Does someone know useful shift registers? Are there registers which have latch that takes over data once it's shifted in completely?
Post Edited (MagIO2) : 4/30/2009 11:53:38 PM GMT
The generator shifts out the bits into a shift register. Currently I only have a 74LS322 at hand which has a max. clock frequency of 30MHz. But there are shift registers which could deal with the max. PLL clock frequency of the prop (120MHZ).
On prop-side only 3 pins are needed and that way the port can be expanded by up to 31 port-pins (output only of course). But that's really nice for some Chip-Selects ... or for driving lots of LEDs ...
Does someone know useful shift registers? Are there registers which have latch that takes over data once it's shifted in completely?
Post Edited (MagIO2) : 4/30/2009 11:53:38 PM GMT
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-Phil
" The A6276 is specifically designed for LED-display applications. Each BiCMOS device includes a 16-bit CMOS shift register, accompanying data latches, and 16 NPN constant-current sink drivers. Except for package style and allowable package power dissipation, the device options are identical.
The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 5 V logic supply, typical serial data-input rates are up to 20 MHz. The LED drive current is determined by the user selection of a single resistor. A CMOS serial data output permits cascaded connections in applications requiring additional drive lines. For inter-digit blanking, all output drivers can be disabled with an ENABLE input high. Similar 8-bit devices are available as the A6275. "
...in a 24-pin DIP package
and
Thanks Brian ... for my code/HW solution it's essential that·shift register·has a shift enable input and a clear input for clearing the shift register.
The driver for 595 looks like it shifts out the bits by itself. What's the max bit frequency of this driver?
Maybe it's worth to give this driver an update and use the video generator there as well, which would allow to shift out the bits at the max. frequency of the 595 (~55Mhz). Only disatvantage is that we loose one bit for stopping the shift-in.
Ok .. I'm currently on the road of developing something different. I'd like to build a RAM interface. Goal is to drive the adress-bus of the RAM with only 4 or 5 pins (using the shift register/video generator approach). Adress is shifted out and then on another clock you can increment the adress. Doing so with counter B and you can fetch new data at a very high rate. Guess I need to develop my own CPLD for that.
Post Edited (MagIO2) : 5/1/2009 6:19:09 PM GMT