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Problem writing my own TV (PAL) Driver — Parallax Forums

Problem writing my own TV (PAL) Driver

ArdecheArdeche Posts: 7
edited 2009-05-05 13:51 in Propeller 1
Hi everybody,

I'm new in Propeller, and I try to write my own PAL TV Driver.
The Propeller Chip is on Hydra, TV_Driver by Parallax work, my Tv is PAL/NTSC.
There is nothing on the screen, no distorted, perhaps no signal.
The Program normaly display a full one colored screen.

Is there anybody who can help me ? Sorry for the French comment, label and variable·in code but I'm French
and if I write in English·I can't read my code !

The file is in attachment, single file need.

Comments

  • ArdecheArdeche Posts: 7
    edited 2009-04-27 20:53
    I think I didn't understand the difference between baseband and broadcast, someone can explain me ?
  • LeonLeon Posts: 7,620
    edited 2009-04-27 21:23
    Baseband is the actual video signal.

    Leon

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  • ericballericball Posts: 774
    edited 2009-04-28 12:55
    Comments in no particular order:

    1. Start with a B&W (i.e. no colorburst) static image (vertical lines are easy).· Make things as simple as possible (i.e. hardcoded constants), then add complexity & retest.

    2. Make your pixel clocks an even divisor of your frame clocks.· i.e. CONSTANTE_Duree_Pixel_SE * N = CONSTANTE_Duree_TramePix_SE.· Remember that the last pixel will repeat until the frame counter expires.

    3. You need to load FRQA with Frequence_Compteur_A*2^32/CLKFREQ.


    A couple of other video notes which I discovered recently:

    1. MOV VCFG, #0 stops the frame & pixel counters.
    2. When·the frame counter expires, the pixel and color registers are reloaded from whatever is sitting on the D & S buses.
    3. When VCFG is started, the frame counter is loaded with 0, so it will take 4096 PLLA clocks before it expires.· This is also the time it takes the PLL to stabilize.


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    Composite NTSC sprite driver: http://forums.parallax.com/showthread.php?p=800114
  • ArdecheArdeche Posts: 7
    edited 2009-04-28 14:15
    I modified for B&W

    I calculated Pixel clock and Frame clock so·I hope there good.

    And modified FREQA. But there is also nothing on the screen.

    I didn't have an oscilloscope so I don't know if there is something out. If someone have one, could you test my program ? I probably buy an oscilloscope but next week.



    The modified file is in attachment.
  • ericballericball Posts: 774
    edited 2009-04-28 17:54
    Three items:

    1. Hard code Frequence_Compteur_A rather than using Calcul_FRQA. Once you've got a stable picture, then reintroduce the routine.
    Frequence_Compteur_A LONG $E30053E ' 4_433_618,75 Hz * 2^32 / 80_000_000 Hz

    2. You changed CONSTANTE_Config_compteur_A, you want PLLA to be CTRA * 16
    CONSTANTE_Config_compteur_A = %0_00001_111_0000000_00000000_00000000

    3. I think the main problem is your Iterateur loop (IF_Z instead of IF_NZ). Use DJNZ Iterateur, #Ligne instead of SUB/JMP.

    For your test, do 354 sync ($00), 1224 blank ($02), 1884 white ($07), 1078 blank ($02).

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    Composite NTSC sprite driver: http://forums.parallax.com/showthread.php?p=800114
  • ArdecheArdeche Posts: 7
    edited 2009-04-28 20:37
    I made a lot of mistakes in my loop (infinite loop), thanks
    but it doesn't work anyway
    ericball said...
    Three items:

    ...

    For your test, do 354 sync ($00), 1224 blank ($02), 1884 white ($07), 1078 blank ($02).
    This test patern·354 sync ($00), 1224 blank ($02), 1884 white ($07), 1078 blank ($02) work on every TV ?

    And I don't understand how to use it.

    ·My new modified file.
  • ArdecheArdeche Posts: 7
    edited 2009-04-29 19:00
    The mistake is not in my code, is in my brain, there is something in video or in vsu that I don't understand.

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  • ArdecheArdeche Posts: 7
    edited 2009-05-02 19:21
    There is some thing I don't understand:
    Why the FREQA register is set by (Frequency Color) / (system frequency) * 2^32 ?
    FREQA is directly connect to the VSU and made the output frequency (pixel and frame clock) so he must be a multiple of video frequency (4.43 or 3.58 MHz * 16 say the datasheet), system frequency is not connect to the VSU.
    Datasheet say the pixel and the frame clock is the PPLA not the system clock (Page 12 on the Datasheet V1.2 and Page 320 on the Manual V1.01).

    If someone can tell me more. Thank.

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  • ericballericball Posts: 774
    edited 2009-05-02 22:25
    Read through the Counter AppNote, it explains how the counters work.

    In brief, in internal PLL mode every system clock (i.e 80MHz) FRQA is added to PHSA.· Bit 31 is fed into a 16x PLL.· This can then be divided down by a power of two to feed the video counters and shifters.




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    Composite NTSC sprite driver: http://forums.parallax.com/showthread.php?p=800114
    NTSC color bars (template): http://forums.parallax.com/showthread.php?p=803904
  • ArdecheArdeche Posts: 7
    edited 2009-05-05 13:51
    A stupid configuration error on VCFG. Now I have something on my TV screen.
    Thank, ericball.

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