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Serial output with video generator — Parallax Forums

Serial output with video generator

scottascotta Posts: 168
edited 2009-03-23 21:43 in Propeller 1
Hi,

Is it possible to use the video generator to transmit serial
data to multiple serial IC's

There are 8 of them and each IC has Clock, Data and Load.

I have seen many examples of the video generator but
have not been able to get my head around it.

Sincerely,

Scott

Comments

  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-03-23 18:21
    Yes, you can certainly do this, but the challenge might be doubling the bits in the data words (e.g. 10101010 -> 1100110011001100) to accommodate the clock in the video data stream. You could also drive the video circuitry with a mode %00100 or %00101 CTRA (you don't have to use mode %00011) and use either the positive or negative output as your shift clock. In this case, you'd be configuring for one clock per bit in VSCL.

    -Phil
  • scottascotta Posts: 168
    edited 2009-03-23 18:45
    Phil,

    Is there a way I can slow the video generator down to a crawl so I can
    watch the waveforms with a scope (or a few LED's) ?

    Also, what example should I start modifying: 8xPWM, Composite or VGA ?

    Thanks Phil.

    Scott
  • scottascotta Posts: 168
    edited 2009-03-23 19:11
    Phil, if your still there.

    If the clock is done with CTRA then my bits don't need expanding (0110 ->> 00111100). Then
    I'm really just pointing the video generator at my bits and off it goes ?

    Scott
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-03-23 20:32
    scotta said...
    Is there a way I can slow the video generator down to a crawl so I can watch the waveforms with a scope (or a few LED's) ?
    500KHz is about the minimum unless you include the clock in the video data stream and expand the data. That's because the PLL needs at least 4MHz for stability and will only divide as low a 1/8.
    scotta said...
    If the clock is done with CTRA then my bits don't need expanding (0110 ->> 00111100). Then I'm really just pointing the video generator at my bits and off it goes ?
    Yup.

    -Phil
  • scottascotta Posts: 168
    edited 2009-03-23 21:02
    What order do I pack the Data, Clock and Load bits into a packet (A video frame ??) ?

    Scott
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2009-03-23 21:29
    Video data are shifted out LSB-first. Each frame consists 16 or fewer "pixels" in four-color mode; 32 or fewer, in two-color mode. Each one- or two-bit "color" actually points to an eight-bit color value that's sent along with the pixels in each frame. So if you have more than two or four possible combinations of data, clock, and select, you will need to chop your frame into smaller pieces, so each subframe consists of no more than two or four different colors.

    For example, if your data consist of a single serial data line and a clock, and one /ENA line, your four possible values during data transmission would be:

    DAT CLK /ENA
     0   0   0
     0   1   0
     1   0   0
     1   1   0
    
    
    


    A prologue and postlogue, when /ENA is being asserted or deasserted might have a set of "colors" like this:

    DAT CLK /ENA
     0   0   0
     1   0   0
     0   0   1
     1   0   1
    
    
    


    Explaining the video peripheral in much further detail is beyond the scope of a forum response, I'm afraid. You really need to consult some good documentation. Andr
  • scottascotta Posts: 168
    edited 2009-03-23 21:43
    That makes sense now.

    Thanks a bunch Phil !

    Scott
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