I2C problems in SX/B 2.00.16 with use of the uM-FPU V2. But works in SX/B 1.51
Sens-a-Dat
Posts: 44
I am enclosing a SX48 program which simply uses two LEDs and the uM-FPU V2 math coprocessor. The LEDs are being used to help us determine where in the program we are having problems.
We have compiled the program in both the SX/B 2.00.16 and SX/B 1.51.03 compiler versions. And we are unable to have good I2C communications between the SX48 and the math coprocessor utilizing the 2.00.16 compiler.
In the programs we write, we check the returned acknak value from the I2C device to ensure communications is fine. This is where we are noticing wrong values under the new compiler.
To test the theory that the I2C compiled codes v2.00.16 may be the cause of the communication errors, we placed the assembly codes of the I2C commands which we compiled under v1.51.03 I2 into our larger program which was then compiled under 2.00.16. After doing this, the I2C communications with the uM-FPU v2 was fine once again.
Does anyone have any insight on how to remedy this under the newer compiler? Or is this a software issue for us?
Thank you,
Gary
We have compiled the program in both the SX/B 2.00.16 and SX/B 1.51.03 compiler versions. And we are unable to have good I2C communications between the SX48 and the math coprocessor utilizing the 2.00.16 compiler.
In the programs we write, we check the returned acknak value from the I2C device to ensure communications is fine. This is where we are noticing wrong values under the new compiler.
To test the theory that the I2C compiled codes v2.00.16 may be the cause of the communication errors, we placed the assembly codes of the I2C commands which we compiled under v1.51.03 I2 into our larger program which was then compiled under 2.00.16. After doing this, the I2C communications with the uM-FPU v2 was fine once again.
Does anyone have any insight on how to remedy this under the newer compiler? Or is this a software issue for us?
Thank you,
Gary
Comments
The I2C commands where changed to allow for clock-stretching, a rarely used feature in I2C. Maybe that is causing the problem.
I think I have a uM-FPU, but I'll have to find it.
P.S. You don't need to break your code into pages, the compiler handles that now (even 1.51.03).
Bean.
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There is a fine line between arrogance and confidence. Make sure you don't cross it...
Post Edited (Bean (Hitt Consulting)) : 3/6/2009 7:27:53 PM GMT
Has this been resolved?
Also, according to this piece of compiled code:
it appears the SCL signal clocks at 200kHz (50 cycles low,·50 cycles high·@20MHz).
Is there an option to force 100kHz (or even slower)?
If a I2C device misses the clockpulse due to high speed,
maybe the line
· 1497· 04CE· 0746······· JNB RB.2,@$·················· ; wait for SCL·input high
blocks program execution (wait forever)
Edit: just remembered I2CSPEED directive.
I2CSPEED 0.5 forces 100kHz
regards peter
Post Edited (Peter Verkaik) : 6/17/2009 11:06:24 AM GMT
Do you have the uM-FPU chip ? Can you confirm that it doesn't work ?
Bean.
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There is a fine line between arrogance and confidence. Make sure you don't cross it...
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(I still wait to get the exact eeprom that is used) and most of
the time the program stalls. So I will try I2CSPEED first
once I hear what eeprom is used and checked its datasheet
regarding timing.
The code appears to use a 256byte eeprom. Not sure what happens
if it turns out the actual eeprom has higher capacity (2-byte address).
I do have a v3.1 umFPU, but that won't do as a test (different cpu).
regards peter
Be sure to let me know what the cause of the "stall" is, so I can address it.
Like I said earlier, the I2C code was changed. But if it is causing problems I will change it back. Clock stretching is not a commonly used feature.
Bean.
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There is a fine line between arrogance and confidence. Make sure you don't cross it...
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I have had no problems with I2C in 2.x and that's with a wide variety of devices, some use clock-stretching, some do not. The only time I get stalls is when the peripheral "locks" up while the master is waiting for the clock to be released. In the case of the Stamp, there is a master "timeout" on I2C commands so the program moves on if the clock is not released. This would be a nice addition to SX/B, but the WDT can also be used in this context.
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When the going gets weird, the weird turn pro. -- HST
1uffakind.com/robots/povBitMapBuilder.php
1uffakind.com/robots/resistorLadder.php
JNB SCLPIN,$
It is easy to turn this into a loop:
MOV __PARAM4,#I2CTIMEOUT
:loop
· JB SCLPIN,@:loopend
· DJNZ [url=mailto:__PARAM4.@:loop]__PARAM4.@:loop[/url]
:loopend
Regarding my debugging: the I2C eeprom used is an Atmel AT24C01B
operating at 5 Volt. The datasheet specifies 1MHz clock maximum.
This eeprom is not likely to be the cause for my stalling program.
When I do find the cause I will report it here if there is an I2C issue.
regards peter
Deja vu. Had this exact same discussion w/Bean et al some months ago. I used a similar code example for timeout as what you posted. I pointed out that many, many peripherals are essentially micro based, and in my experience, I have yet to find a micro based peripheral with hardware I2C that does not use clock stretching.
However, there is not necessarily enough __PARAM registers to loop for timeout on clock stretching, so it may not be quite that simple. The reason is that depending on the I2CSPEED setting and the clock speed of the SX, more params get used for nested loops to delay time on the IC signals.
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When the going gets weird, the weird turn pro. -- HST
1uffakind.com/robots/povBitMapBuilder.php
1uffakind.com/robots/resistorLadder.php
The delayloops for I2CSPEED are all by themselves and so
the used __Param become free once a delayloop finishes.
For the clockstretching, assume 2 bytes, __Param4 and __Param5
CLR __PARAM4
CLR __PARAM5
:loop
JB SCLPIN,@:loopend······ '2cycles to stay in loop
DJNZ __PARAM5,@:loop··· '4cycles to stay in loop, 2 cycles to exit param5 loop
DJNZ __PARAM4,@:loop·· '4 cycles to stay in loop
:loopend
Waitloopcycles max = (256*6 + 2)*256 = 393728
@50MHz that equals 393728/50MHz sec = 7.87 msec
That really should be enough even for the slowest I2C device.
In reality the maximum waittime may even be longer due to a running isr.
regards peter