Why is "ADD W,#const" not a valid instruction, but "ADD W,reg" is valid ?

Bean · 2009-02-27 03:18

I know that the SX instruction set is the same as the PIC, just a different syntax.

AND W,#const is legal
OR W,#const is legal
XOR W,#const is legal

BUT...

ADD W,#const is NOT legal
SUB W,#const is NOT legal

BUT...

ADD W,reg is legal
SUB W,reg is legal

It just seems odd to me that those two are not legal commands. Is there any reason that those are omitted ?

Bean.

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william chan · 2009-02-27 04:14

I think each variation in an instruction uses up precious silicon real estate.
Some variations use up more silicon space than others.
So the chip designers just decided to exclude some instruction variations to save silicon space and microcode space.

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pjv · 2009-02-27 16:03

Terry;

The instructions are not the same.... very similar but different.

Cheers,

Peter (pjv)
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Peter Verkaik · 2009-02-27 17:42

There are more handy instructions missing,
like SUB w,# and SUB w,fr
Also INC/DEC W is missing.
By the way, the instructions INC W and DEC W
are accepted by the assembler, generating
code for INC IND and DEC IND.
W can be accessed as register WREG but then
RTCC is not accessible.

One way to add a constant to W without using
another register, is to call an ADD W,PC instruction
at a specific address. Quite awkward, but this technique
does allow for INC W and DEC W.

org $000
jmp _interrupt
__incW:
······· add w,pc·· ;add 1 to w
······· retp
__addW3:
······· add w,pc·· ;add 3 to w
······· retp
_interrupt:

org $7FC·· ;on sx48 org $FFC
__decW:
······· add w,pc·· ;add $FC to w
······· jmp @__addW3·· ;add 3 to w

To add 1 to w use CALL @__incW
To sub 1 from w use CALL @__decW

This code works quite nice with sxb.

regards peter

Post Edited (Peter Verkaik) : 2/27/2009 6:15:58 PM GMT

Guenther Daubach · 2009-02-27 22:10

Peter,

>>
By the way, the instructions INC W and DEC W
are accepted by the assembler, generating
code for INC IND and DEC IND.
W can be accessed as register WREG but then
RTCC is not accessible.
<<

Usually, I clear the OPTION.7 bit (i.e. RTW) in order to map W into address $01 instead of the RTCC register.

In most applications, there is no need to directly access RTCC but accessing W via address $01 as WREG is pretty valuable to INC or DEC WREG, for example.

Please don't ask me why SASM generates DEC IND, or INC IND for DEC W or INC W instructions but correctly generates references to $01 when WREG is used as parameter. I don't have any clue. IMO, this is an SASM bug that should have been fixed since many years.

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G

Peter Verkaik · 2009-02-28 05:53

Gunther,

I tried using wreg but strange things happen.

  1036  01A6  0C02              mov     wreg,#02                ;  mov w,#02   
        01A7  0021                                              ;  mov w,w
  1037  01A8  0C20              add     wreg,#32                ;  mov w,#20   
        01A9  01E1                                              ;  add w,w

The generated code for ADD WREG,#32 appears to·be a mov rather than add,
but it does a reveal a ADD W,W instruction which appears to work in SxSim.

Would code $1E1 be a secret code for ADD W,W (leftshift W) ?
Using ADD W,W directly results in compiler error (using add w,wreg is fine).

Edit: this may well answer Bean's question. The fact that for adding a constant,
register w is always used as temporary storage for the constant, add w,#constant
can never work. Then again, neither can add wreg,#constant but that is not
flagged as error.

regards peter

Post Edited (Peter Verkaik) : 2/28/2009 8:26:52 AM GMT

Why is "ADD W,#const" not a valid instruction, but "ADD W,reg" is valid ?

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