Help decyphering data sheet.
Jed
Posts: 107
I bought some shift registers to play with. I also would like to learn to understand data sheets better, so I'm asking for some help with these specific chips as far as understanding how they work, based solely from the data sheet. I've attached the data sheet, which doesn't offer much in the way of verbal explaination. Is there some sort of tutorial somewhere that goes over how to read these things? I know that for this chip there are others who've already walked this path and have laid everything out in easy to read instructions, complete with code, but I'd like to be able to figure this stuff out myself in case I ever run into a chip that's not well documented.
First what's the difference between a shift register, and a storage register? I'm guessing the shift register is just the internal "memory" that holds the incoming data while shifting data in, and that the storage register is the actual output state of the pins. The data sheets shows that they have separate clocks. What would be the reason for using one over the other rather than just tying both clocks together?
Next, I'm assuming that the truth table is where I need to look to figure out how to clock in data? Going row by row this is how I understand it:
pulling pin 13 low enables the output pins
pulling pin 13 high disables them.
pulling pin 10 low clears the shift register (to ready for incoming data).
Pulling pin 10 high and pin 14 low will shift a 0 into the shift register on the rising edge of pin 11
Pulling pin 10 high and pin 14 high will shift a 1 into the shift register on the rising edge of pin 11
Nothing happens on the falling edge of pin 11
Date is copied from the shift register to the storage register on the rising edge of pin 12
Nothing happens on the falling edge of pin 12
Did I understand that correctly?
Now for figuring maximum currents, I'm confused on this part. It says:
DC Input Diode Current is 20mA
DC Output Diode Current is 20mA
DC Output Current Per Output Pin QA-QH is 35mA
DC Output Current Per Output Pin QH’ is 25mA
DC VCC or Ground Current is 70mA
Huh? How do I figure the maximum current thrugh each pin individually as well as the chip as a whole from these numbers? I would assume "DC Output Current Per Output Pin QA-QH" and "DC VCC or Ground Current" respectively, but what about those other numbers? What are they for?
PS, thanks for putting up with me [noparse];)[/noparse]
Post Edited (Jed) : 2/25/2009 3:03:37 PM GMT
First what's the difference between a shift register, and a storage register? I'm guessing the shift register is just the internal "memory" that holds the incoming data while shifting data in, and that the storage register is the actual output state of the pins. The data sheets shows that they have separate clocks. What would be the reason for using one over the other rather than just tying both clocks together?
Next, I'm assuming that the truth table is where I need to look to figure out how to clock in data? Going row by row this is how I understand it:
pulling pin 13 low enables the output pins
pulling pin 13 high disables them.
pulling pin 10 low clears the shift register (to ready for incoming data).
Pulling pin 10 high and pin 14 low will shift a 0 into the shift register on the rising edge of pin 11
Pulling pin 10 high and pin 14 high will shift a 1 into the shift register on the rising edge of pin 11
Nothing happens on the falling edge of pin 11
Date is copied from the shift register to the storage register on the rising edge of pin 12
Nothing happens on the falling edge of pin 12
Did I understand that correctly?
Now for figuring maximum currents, I'm confused on this part. It says:
DC Input Diode Current is 20mA
DC Output Diode Current is 20mA
DC Output Current Per Output Pin QA-QH is 35mA
DC Output Current Per Output Pin QH’ is 25mA
DC VCC or Ground Current is 70mA
Huh? How do I figure the maximum current thrugh each pin individually as well as the chip as a whole from these numbers? I would assume "DC Output Current Per Output Pin QA-QH" and "DC VCC or Ground Current" respectively, but what about those other numbers? What are they for?
PS, thanks for putting up with me [noparse];)[/noparse]
Post Edited (Jed) : 2/25/2009 3:03:37 PM GMT
pdf
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Comments
Going thru your list of pin descriptions, whats the chip number?
Brice
Think of the storage clock as a "latch" or a "pulse/pull-high to put data on pins". Tying both "clocks" together is uncommon -- if you do, every bit shifted in will appear on pins (the wrong ones) as they shift through the byte. "Normally" you would shift in, say, 8 bits (using the shift clock and data line); when all 8 bits are clocked in, then set the storage clock (latch) high to put that data on the pins.
Max current through the whole chip is the VCC current (i.e., that is how much total current the chip can pull before it may become damaged). The normal output pins (QA-QH) can handle up to 35ma. QH' is data only output for cascading to another chip, TTL logic only, which is why it has a lower rating (it shouldn't be driving anything but another logic input). The diode currents (output clamps) are ratings for protecting the pin in the event of short-circuits on the pin.... so.....
- max current source/sink on pin -- 35ma
- but total output limited to 70ma (so you could have maybe 3 pins driving LEDs at 20ma at any one time)
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When the going gets weird, the weird turn pro. -- HST
1uffakind.com/robots/povBitMapBuilder.php
1uffakind.com/robots/resistorLadder.php
I'm going to be playing with LED matrices with these chips.
Also, one other question, where do I find or figure out the max baud rate I can use?
Post Edited (Jed) : 2/25/2009 3:12:24 PM GMT
It's not baud rate per se, but maximum clock speed. Generally you can go *very* fast:
You will never even come close to 55mhz on a Stamp, even if you "bit-bang" the shiftout routines.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
When the going gets weird, the weird turn pro. -- HST
1uffakind.com/robots/povBitMapBuilder.php
1uffakind.com/robots/resistorLadder.php