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74HC165 Parallel to Serial — Parallax Forums

74HC165 Parallel to Serial

GaudwareGaudware Posts: 18
edited 2008-11-11 20:55 in Propeller 1
I was wanting to know if any one could tell me how to use this with the propeller chip
Any help will helpful, Thanks in advance.

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Comments

  • sylvie369sylvie369 Posts: 1,622
    edited 2008-11-11 18:25
    You're probably going to have to say what you want it to do. What are you trying to accomplish with it?
  • LeonLeon Posts: 7,620
    edited 2008-11-11 18:30
    The SPI code in the Object Exchange should work.

    Leon

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  • GaudwareGaudware Posts: 18
    edited 2008-11-11 18:37
    I look into it thanks

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  • StefanL38StefanL38 Posts: 2,292
    edited 2008-11-11 19:16
    Hello,

    @Leon: are you sure that THIS chip will work with an SPI-object ?

    it's NOT specified as an SPI-device with PINs named

    SCLK — Serial Clock (output from master)
    MOSI/SIMO — Master Output, Slave Input (output from master)
    MISO/SOMI — Master Input, Slave Output (output from slave)

    I guess that it will NOT work with the SPI-protocol

    could you say a explicit YES or NO that a 74HC165 which has
    Pins named
    PL - asynchronous parallel load input (active LOW)
    CP - clock input (LOW-to-HIGH edge-triggered)

    @Gaudware:

    This is the description in the datasheet how the bits are transferred
    from the chip to the serial output

    When the parallel load
    (PL) input is LOW, parallel data from the D0 to
    D7 inputs are loaded into the register asynchronously.
    When PL is HIGH, data enters the register serially at the
    Ds input and shifts one place to the right
    (Q0 ® Q1 ® Q2, etc.) with each positive-going clock
    transition. This feature allows parallel-to-serial converter
    expansion by tying the Q7 output to the DS input of the
    succeeding stage.
    The clock input is a gated-OR structure which allows one
    input to be used as an active LOW clock enable (CE) input.
    The pin assignment for the CP and CE inputs is arbitrary
    and can be reversed for layout convenience. The
    LOW-to-HIGH transition of input CE should only take
    place while CP HIGH for predictable operation. Either the
    CP or the CE should be HIGH before the
    LOW-to-HIGH transition of PL to prevent shifting the data
    when PL is activated.

    As the datasheet has charateristics listed for Vcc = 2V it MIGHT work at 3.3V but I#m not sure

    there are other CMOS-chips that explicit work properly with a supply-voltage of 2.8V - 5V

    and for the 74HC597 which has the same functionality as the 74HC165 there already exists an object in the obex

    best regards

    Stefan
  • Mike GreenMike Green Posts: 23,101
    edited 2008-11-11 19:27
    The 74HC165 should work just fine with a Propeller. The easiest way to use it would be with the BS2 Compatibility Library from the Object Exchange and using the SHIFTIN method. The 74HC165 is not described as an SPI chip, but it uses that protocol in that there's a chip select (clock enable) and the data is shifted out serially under control of a clock (in this case on the leading positive edge).
  • GaudwareGaudware Posts: 18
    edited 2008-11-11 19:56
    Thanks for the Input I am going to use the BS2 Functions object and look at some code in stamps works book for coding purposes

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  • LeonLeon Posts: 7,620
    edited 2008-11-11 20:55
    StefanL38 said...
    Hello,

    @Leon: are you sure that THIS chip will work with an SPI-object ?

    it's NOT specified as an SPI-device with PINs named

    SCLK — Serial Clock (output from master)
    MOSI/SIMO — Master Output, Slave Input (output from master)
    MISO/SOMI — Master Input, Slave Output (output from slave)

    I guess that it will NOT work with the SPI-protocol


    Stefan

    I think it's similar in operation to the 74HC595 (ser-par), which is definitely an SPI device.

    Leon

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    Amateur radio callsign: G1HSM
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