Reliable inputs???
oliver_man_77
Posts: 7
I'm currently working a project where I will be using an encoder input to synchronize events with a photoeye triggering the start. The photoeye will be ran to an opto-coupler then to pin 18.· For testing purposes now I just have a lead on pin 18 that I take between gnd and vcc. What I have noticed is simply touching the bare wire by hand is enough to start the cycle. What are others doing for inputs? Should I use a pull-up resistor and use an opto-coupler with an open collector output?
Sorry the code is a little sloppy, still developing and havn't cleaned it up yet.
CON _clkmode = xtal1 + pll16x _xinfreq = 5_000_000 'Set clock to 80 MHz high = 1 low = 0 out = %1 sync = 18 'Set pin # for Product Detect encoder = 16 'Set pin # for Encoder Input white = 21 'Set pin # for White Start cyan = 22 'Set pin # for Cyan Start magenta = 23 'Set pin # for Magenta Start yellow = 24 'Set pin # for Yellow Start black = 25 'Set pin # for Black Start ' VAR long posn ' PUB Start_cycle ' dira[noparse][[/noparse]21..25]~~ repeat waitpeq(|<sync , |< sync, 0) 'Wait for Pin to go low waitpeq(0 , |< sync, 0) Start_White outa[noparse][[/noparse]black] := 0 'Clear Yellow Start signal Start_Cyan outa[noparse][[/noparse]white] := 0 'Clear Black Start signal Start_Magenta outa[noparse][[/noparse]cyan] := 0 'Clear White Start signal Start_Yellow outa[noparse][[/noparse]magenta] := 0 'Clear Cyan Start signal Start_Black outa[noparse][[/noparse]yellow] := 0 'Clear Magenta Start signal ' Pri Start_White outa[noparse][[/noparse]white] := low 'Configure counter module ctra[noparse][[/noparse]30..23] := %01010111 'Set ctra module to POSEDGE detector ctra[noparse][[/noparse]8..0] := encoder 'APIN to encoder frqa := 1 phsa := -200 'Encoder counts to delay White signal repeat while phsa [noparse][[/noparse]31] outa[noparse][[/noparse]white] := high 'Set White Start signal ' Pri Start_Cyan outa[noparse][[/noparse]cyan] := low 'Configure counter module ctra[noparse][[/noparse]30..23] := %01010111 'Set ctra module to POSEDGE detector ctra[noparse][[/noparse]8..0] := encoder 'APIN to encoder frqa := 1 phsa := -200 'Encoder counts to delay Cyan signal repeat while phsa [noparse][[/noparse]31] outa[noparse][[/noparse]cyan] := high 'Set Cyan Start signal ' Pri Start_Magenta outa[noparse][[/noparse]magenta] := low 'Configure counter module ctra[noparse][[/noparse]30..23] := %01010111 'Set ctra module to POSEDGE detector ctra[noparse][[/noparse]8..0] := encoder 'APIN to encoder frqa := 1 phsa := -200 'Encoder counts to delay Magenta signal repeat while phsa [noparse][[/noparse]31] outa[noparse][[/noparse]magenta] := high 'Set Magenta Start signal ' Pri Start_Yellow outa[noparse][[/noparse]yellow] := low 'Configure counter module ctra[noparse][[/noparse]30..23] := %01010111 'Set ctra module to POSEDGE detector ctra[noparse][[/noparse]8..0] := encoder 'APIN to encoder frqa := 1 phsa := -200 'Encoder counts to delay Yellow signal repeat while phsa [noparse][[/noparse]31] outa[noparse][[/noparse]yellow] := high 'Set Yellow Start signal ' Pri Start_Black outa[noparse][[/noparse]black] := low 'Configure counter module ctra[noparse][[/noparse]30..23] := %01010111 'Set ctra module to POSEDGE detector ctra[noparse][[/noparse]8..0] := encoder 'APIN to encoder frqa := 1 phsa := -200 'Encoder counts to delay Black signal repeat while phsa [noparse][[/noparse]31] outa[noparse][[/noparse]black] := high 'Set Black Start signal '
Sorry the code is a little sloppy, still developing and havn't cleaned it up yet.
Comments
Yes, an input needs to either be driven high, or pulled low. Never left floating.
Outputs, likewise, source current when on, and sink current when off.
It's always been like that.
Your open-collector and pullup resistor idea would work well, but keep in mind that configuration is inherently an inverter. (0 will be "trigger").