VHDL Coding Help

matts_persic

Does anyone have any experience with VHDL code?· I wanted to make a "black box" to condition a signal to be fed into a BS2.· The signal is a .5 sec pulse going into an Altera Cyclone II FPGA and need some VHDL code to set an output·pin high while the pulse stream is present.· Any ideas on how to VHDL it?· The·least desirable·option is to use the BS2 directly.· Thanks,· Matts Persic +1 (801) 652-2590 matts.persic@doppelmayrCTEC.com

Phil Pilgrim (PhiPi)

'Don't know VHDL. If I were doing this, I'd use a Set/Reset flip-flop. The pulse would set it, and the BS2 would reset it once it's seen that a pulse was captured. Also, a 555 can be configured as a retriggerable monostable that will keep its output in one state as long as a pulse stream is present. You set the time constant using RC values for the time between pulses, plus a reasonable hold time.

-Phil

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waltc

No experience yet, still learning VHDL.

That said, your question is better posed at Altera's fpga forum.

pharseid

· Also don't know VHDL, but I've fooled around with Altera's development software (Quartus, I think) and unless it's really changed in the last couple years, you should be able to do this graphically. Using one of Phil's idea's maybe. It struck me at that time that everyone learning digital electronics should download their software just to use it as a simulator.

-phar

matts_persic

Thanks Phil,
I am running into a problem: if the square wave fails (i.e. a broken signal wire) then there is a constant low and that is no problem, but when it fails and shorts to high, then it is a problem because the counter stays in a constant reset state.· Here is the whole project:· I'm using a 555 to generate a 250 ms square wave which drives an IR LED.· The signal is transmitted along a fiber optic cable.· An IR phototransistor picks up the signal and generates the square wave.··Now, at this point,·I want to determine if the square wave is present -- if the fiber optic cable was breeched there would be no square wave, there would just be a high or low continous signal.· So I was running a up counter and using the fiber square wave to reset it.· If the up-counter reached a predetermined number, then I knew it had not seen a reset.· The problem is that if the reset is an active low, then, if the fiber signal fails low, it is a constant state of reset.· Do you have any idea how I might deal with that problem?
Thanks,
Matts

Phil Pilgrim (PhiPi)

Matts,

Use the attached circuit to edge-trigger the set/reset flipflop from your pulse train. That way, if the output gets stuck high, you can still reset it.

-Phil

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Phil Pilgrim (PhiPi)

Matts,

Here's a D-type pulse catcher that's edge-triggered and avoids the discrete components:



-Phil

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