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SX-28 Internal R/C Clock Issues — Parallax Forums

SX-28 Internal R/C Clock Issues

Woodys62Woodys62 Posts: 1
edited 2008-08-08 01:41 in General Discussion
I am experiencing an internal oscillator freq cal problem with a batch of ·SX-28AC/SS chips. I am using SX-Key v. 3.2.3 and my assembly device statement is:
··········· DEVICE··········· SX28L,STACKX,OSC4MHZ,BOR26,WATCHDOG,PROTECT
··········· FREQ·· ··········· 4_000_000
··········· IRC_CAL·········· IRC_4MHZ
The problem chips all have date code 0636. This batch of chips seems to favor a low frequency tendency. Some of these chips are programming to as much as 15% low when using the IRC_4MHZ directive. I have noticed illogical clock freq variations when reprogramming chips and substituting IRC_FAST or IRC_SLOW into the IRC_CAL statement above. Some chips will exhibit a faster clock freq when programmed with the IRC_SLOW directive and a slower clock freq when programmed with IRC_FAST. This seems to be opposite to the intended result. Can someone explain the programming process that occurs when the IRC_CAL· directive is serviced by the SX-KEY programmer? What is the actual cal freq determining process when the IRC_4MHZ directive is used?

Comments

  • ZootZoot Posts: 2,227
    edited 2008-08-08 01:41
    See the SX-Key (SX) manual for more details, but the paraphrased version goes something like this:

    IRC_FAST or IRC_SLOW -- this *manually* sets calibration fuse bits for the internal clock. Generally these are used because you *don't* want to calibrate the internal clock (which slows downloading).

    Using IRC_4MHZ will force the SX IDE to calibrate the clock then download the program. This "calibrated" clock can still be quite off, and is subject to all kinds of fluctuations based on temperature, load, etc. If you have time-critical code then the internal clock may never be accurate enough for you.

    That said, being 5%-10% off is one thing, 15% seems pretty high.

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