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Ddr ram — Parallax Forums

Ddr ram

stevenmess2004stevenmess2004 Posts: 1,102
edited 2008-06-15 20:02 in Propeller 1
Has anyone looked at making a board to interface DDR RAM with microcontrollers?

I've just been looking at the pinouts and it looks like there are 64 data pins, 16 or 17 address pins, some bank pins and a couple of clock and other pins needed. How hard would it be for someone to come up a board like Andre's SRAM board for DDR ram?

Comments

  • AleAle Posts: 2,363
    edited 2008-06-14 07:08
    difficult, especially DDR.(SDR is much simpler and equally dense).

    But it depends on the uC. The propeller can talk to external devices in parallel at 5 or so MT/s ... not more, reliably. (would have been great if it had a way of high bandwidth communications...)

    The only way I found was if you have a CPLD or similar that takes care of generating addresses, refresh and so on, that you serve an address and maybe a length and it serves you with data, if well synchronized, maybe 10 MT/s or at clock speed...
  • LeonLeon Posts: 7,620
    edited 2008-06-14 13:10
    Why do you need DDR RAM? The speed is wasted on the Propeller.

    Leon

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  • stevenmess2004stevenmess2004 Posts: 1,102
    edited 2008-06-14 22:36
    Don't need the speed, its just that DDR RAM is cheap, easy to get and provides a large amount of memory. Wonder how a shift register would go for the data and address pins? That should take the pin count down to something half reasonable. Only problem would be that you would need 8 for the data pins unless you didn't mind not using all the available storage space.
  • Oldbitcollector (Jeff)Oldbitcollector (Jeff) Posts: 8,091
    edited 2008-06-14 22:42
    I love the idea! Use something cheap and easy to obtain.
    I've got stacks of DDR and even if 80% of it was wasted in the use
    it would still be worth it!

    OBC

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  • jazzedjazzed Posts: 11,803
    edited 2008-06-14 23:07
    I've added a 90's era 1MB DRAM SIMM to my proto-board and it holds data perfectly and allows enough pins for mouse/vga/sd/serial-io but access is slower than I would like (about 4us per 32bit page mode byte access). Using TV instead of VGA would free several pins and would allow 4MB-16MB ... if I could find one[noparse]:)[/noparse]. I plan to load and run programs from SD card via a C LMM kernel, but have been too busy with other things.

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  • OwenSOwenS Posts: 173
    edited 2008-06-15 00:34
    Sorry to say, but interfacing any form of SDRAM to the Propeller just isn's practical. The Propeller just can't operate fast enough to meet the minimum timing requirements - and the are just that, minimums. Below them the SDRAM can't recharge it's internal capacitors fast enough. It also has a more complex interface than it's address and data lines would indicate - you have to strobe the lines in the correct order, and then burst, because DDR doesn't support single reads or writes (The reason being that theyre absolutely disasterous for performance - particulalry when the entire bank is open anyway, and the RAM is normally connected to processors with caches which burst read anyway).

    Things are much more complex than for asynchronous DRAM.

    DDR is wandering into FPGA territory. And, if your using an FPGA, you might as well just put the processor on it anyway.
  • Jimmy W.Jimmy W. Posts: 112
    edited 2008-06-15 01:12
    My sentiment exactly Owen, SRAM is viable only because its is STATIC ram, its a stable latch(6 transistors per bit iirc), unlike dram which has to be refreshed or it will lose its state(1 transistor iirc?) also sram you can write the whole address and read a single bit, after sram they cut the address pins in half (and now maybe more) so that 2 strobe are required to read x bits.

    Ack, that all sounded ranty, sorry about that.



    Jimmy

    Post Edited (Jimmy W.) : 6/15/2008 8:42:31 PM GMT
  • AleAle Posts: 2,363
    edited 2008-06-15 20:02
    A DRAM may be easy to connect, but if you do a PCB, a 573 LATCH and a 128K or 512K SRAM needs more or less the same amount of pins. More pins you can save using 2 latches and leaving 3 or so address pins as fast access. Do not forget that with a SRAM you can use any address as A0 and so on, and any data as D0, reducing complexity. Maybe a 4Mx8 or so DRAM could be convenient, but for smaller sizes... a SRAM is a good choice (and a cheap one).

    Jimmy: To loose is not the same as to lose.
    You loose a bolt unscrewing it, but if you lose it... you have to get a new one wink.gif
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