Data Logger Object (samples pins @ 50nS or 12.5nS) - like Dscope
Cluso99
Posts: 18,069
Attached is my release of the Data Logger Object.
Also is a demo program which outputs serially to a terminal program on the PC.
Thanks to Paul Baker's Logic Analyzer (dscope.spin) for the·inspiration and naming conventions and Chip Gracey for his serial object(FullDuplexSerial.spin).
Enjoy · and post any bug reports please.
Update 19May2008: See post below for latest version
Post Edited (Cluso99) : 5/19/2008 2:01:12 PM GMT
Also is a demo program which outputs serially to a terminal program on the PC.
Thanks to Paul Baker's Logic Analyzer (dscope.spin) for the·inspiration and naming conventions and Chip Gracey for his serial object(FullDuplexSerial.spin).
Enjoy · and post any bug reports please.
Update 19May2008: See post below for latest version
Post Edited (Cluso99) : 5/19/2008 2:01:12 PM GMT
Comments
I have 4 cogs working giving 12.5nS at 5MHz.
I have found different ways to synchronise the 4 cogs...
For consecutive single cycles, after trigger you·can do...
mov t1,cnt
add t1, #t2 't2 is set to be 9, 10, 11 or 12 for the first, second, third and fouth cog respectively
waitcnt t1,0
Note that 9 is the minimum, otherwise you will have to wait for a complete loop of cnt (guess about 50 seconds?)
For alternate cycle pairs, after trigger you·can do...
rdlong t1,hubmem
If each cog is a successive cog, then each cog will be exactly 2 clock cycles after each other.
Post Edited (Cluso99) : 5/19/2008 4:05:19 AM GMT
Personally I prefer manual synchronisation (explicit waitcnt). You'll never know what COGID's you're working with.
Anyway, will you share the 12.5 version with us?
Together will full timing specs for the main instructions.
Please note that your rdlong synchronisation doesn't always work (provided I understood it correctly). Assuming cogs 0..3, cog 0 may just miss its hub window, meaning 1..3 are 2 cycles apart and then a bit later (10 cycles) cog 0 gets access.
All 8 cogs are used in the demo program. The sampling uses 4 cogs which use interleaving to achieve a sample at the clock rate.
I am working on a sequential demo which will record 1880 samples @ 50nS.
Enjoy Yes, you are correct. I had noticed that during testing and then forgot because I was ensuring that not all cogs were being called.
·Update: v0.062 of the Demo program is released. It has a Constant called "Interleave" which will allow the DataLogger to either sample 1880 clocks of 12.5nS (by interleaving) or 1880 clocksx4 of 50nS.
There is a small bug in v0.061 Demo (which has been removed and replaced by v0.062). The object remains unchanged at v0.061.
Enjoy and please report any bugs.
See later postings for latest release.
Post Edited (Cluso99) : 5/20/2008 3:08:02 PM GMT
Can I get Hyperteminal to save Unicode characters?
Might Propterminal do the job?
Thanks for any help - I would really like to display the waveforms in the spin IDE (or something like it) without a lot of work.
It can sample the I/O pins @12.5nS, 50nS, 150nS, 200nS and thence every additional 50nS by a parameter setting (80MHz).
By using 4 cogs it has 1880 samples.
There is a debug statement which can be changed to sample the system CNT register instead of the I/O pins for debugging.
The output is to serial (to a PC) where the data can be analysed or you can write your own code.
Enjoy · and please report any bugs.