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LTC1298 ADC question — Parallax Forums

LTC1298 ADC question

kk Posts: 7
edited 2008-04-21 18:45 in BASIC Stamp
How does one control the sampling frequency of the LTC1298 ADC? We're trying to convert an ECG signal to digital data. The data sheet said that this ADC is capable of sampling 11.1 ksps. Is this the default or can we change it if we want to? Thanks in advance for any info.

Comments

  • Mike GreenMike Green Posts: 23,101
    edited 2008-04-21 18:45
    A figure like this (11.1 ksps) is an absolute maximum under ideal circumstances. The LTC1298 (as described in the datasheet) samples its input 2 1/2 clock cycles after the chip is selected and completes its cycle 17 clock cycles after the chip is selected. Maximum clock frequency is 200kHz.

    The Stamps can't transfer data that quickly. The manual's chapters on the SHIFTIN and SHIFTOUT statements give estimates of the clock frequency used in the various Stamp models. There's also statement overhead that slows it down further.

    EmeSystems' website has some documentation on Stamp speed: www.emesystems.com. Look under "app-notes".
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