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PE Kit Labs - Threshold Logic Voltage — Parallax Forums

PE Kit Labs - Threshold Logic Voltage

Steve NelickSteve Nelick Posts: 25
edited 2008-04-01 07:56 in Propeller 1
I'm working on the Propeller Education Kit Labs, the latest lab, named Counter Modules and Circuit Applications. And, I'm on the first exercise in that lab, which is: Measuring RC With Positive Detector Mode.

On page 3 of the lab,·in a section·titled Measuring RC Decay, it says the Propeller threshold voltage is 1.65 volts. So, what I expected was the Propeller Counter Module would count while the Propeller pin was HIGH, above 1.65, and stop counting when the pin was LOW, below 1.65 V.

When·I look at the RC decay on·an OPTAscope it looks like the Propeller Counter Module stops counting·when the RC·decay·drops below 1.35 volts, not 1.65 volts. So, my question is: what happened to the 1.65 volt threshold?

I tried to measure the Propeller threshold voltage by·using·a 4.7 K resistor in series with a 10 K pot. The results I got were: the Propeller reported HIGH from 3.3 v down to 1.46 v, and LOW from 0.0 V up to 1.36 v. Between 1.36 v and 1.46 v, the Propeller·sometimes reportd·HIGH and sometimes LOW. I searched the Propeller Forum, and I found a note from Ariba that said he measured the Propeller threshold voltage·at 1.41, which is consistent with what I measured.

I looked at the Propeller Data Sheet, and it says the Propeller threshold is 1/2 VDD or 1.6 @ 3.3 VDC. I measured VDD, at a pin on the Propeller label identified as 3.3V, and the reading was 3.3 v, which I guess is VDD.

Comments

  • hippyhippy Posts: 1,981
    edited 2008-03-31 13:57
    On page 25 of PropellerDatasheet_V1.0.pdf it states ...

    Vil, Logic Low ... Vss to 0.3Vdd
    Vih, Logic High ... 0.6Vdd to Vdd

    That's 0V-0.99V, 1.98V-3.3V respectively at 3.3V

    Page 4 does suggest the threshold is 1/2 Vdd.
  • Paul BakerPaul Baker Posts: 6,351
    edited 2008-03-31 21:53
    It's not precisely Vdd/2 but a little lower, this is because the spice model used to calculate the geometry of the PMOS had a couple parameters missing, this ended up overestimating the "strength" of the PMOS transistor. Therefore the pair is not completely matched and has a Vth a little lower than Vdd/2.

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    Paul Baker
    Propeller Applications Engineer

    Parallax, Inc.
  • stevenmess2004stevenmess2004 Posts: 1,102
    edited 2008-04-01 06:09
    How big is the difference between a recognised high and low? Is it 0.3Vdd to 0.6Vdd or is it smaller?
  • Paul BakerPaul Baker Posts: 6,351
    edited 2008-04-01 06:20
    Those numbers are provided for an assured value over all process variation and operating conditions.

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    Paul Baker
    Propeller Applications Engineer

    Parallax, Inc.
  • stevenmess2004stevenmess2004 Posts: 1,102
    edited 2008-04-01 07:56
    Okay, so I assume that the range for any one chip is a fair bit smaller or otherwise the sigma delta ADC wouldn't work very well?
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