Maximum Input Clock

PhilldapillPhilldapill Posts: 1,283
edited 2008-03-25 - 01:37:45 in Propeller 1
I know I've seen this somewhere, but I can't find it. What is the maximum input clock frequency for the prop? This is with PLL on or off... just the absolute max without it going haywire at 25C

Comments

  • RaymanRayman Posts: 9,716
    edited 2008-03-23 - 17:24:40
    [*]
    From my FAQ:

    [*]What's the maximum clock frequency?
    • The rated clock speed is 80 MHz.· The rated maximum external crystal frequency is 10 MHz when using the PLL (phase-locked loop).·
    • 80 MHz is achieved on the proto and demo boards using an external 5 MHz crystal and the PLL in 16x mode.· It can also be done with a 10 MHz crystal and the PLL in 8x mode as with the Hydra.
    • Testing has shown that 100 MHz can be achieved using an external 100 MHz crystal and not using the PLL.· One could also use a 6.25 MHz crystal and the PLL in 16x mode, but this is a non-standard frequency.· However, you could run at 96 MHz with a standard 6 MHz crystal.
    • The· maximum speed is a function of temperature and is currently being tested and will be published in the "final" datasheet.·····
    • Note:· Care must be taken when selecting a crystal as the propeller only uses the fundamental frequency of crystals, but they are often labeled with their second or third harmonics.· This is not an issue for powered oscillators, however, because they have internal circuitry to give the labeled output.
    Prop Info and Apps: http://www.rayslogic.com/
  • PhilldapillPhilldapill Posts: 1,283
    edited 2008-03-23 - 17:28:40
    Darn. I fried the PLL somehow on one of my protoboards and took the old chip off, and just ordered a new chip. I guess I could have gotten a new crystal that was much higher for much cheaper. Mike Green mentioned, in a previous post, that the TV output won't work at slower speeds. If I had an 80mhz external oscillator, could I still use TV ouput without the PLL?

    Thanks Rayman.
  • PhilldapillPhilldapill Posts: 1,283
    edited 2008-03-23 - 17:30:15
  • OwenSOwenS Posts: 173
    edited 2008-03-23 - 18:01:39
    A crystal is not what you want. The Prop cannot drive an 80Mhz crystal (In fact, little can) You need a crystal oscillator, which it looks like is what you have linked to
  • Mike GreenMike Green Posts: 22,917
    edited 2008-03-23 - 18:15:24
    The 80MHz crystal oscillator from Futurlec looks like it would work and should let you do TV. You would connect the oscillator output to the XI pin. _CLKMODE has to be XINPUT and _XINFREQ has to be 80_000_000.
  • PropabilityPropability Posts: 142
    edited 2008-03-24 - 15:24:27
    I didn't see any specs on that oscillator from futurlec if it was 5 volt or 3.3 volt so you may want to verify( found some at digi-key that are 3.3V) . I'm in the same boat with my protoboard (blown pll but works with a crystal) - had it set up with the same connector as the Hyrda (just used the connections for the eeprom and the 3.3V feedback ) and a tiny12 to monitor the 3.3 feedback line so when it changes the tiny would do the reset automatically.

    Did not know what to do with it but its been running now for several months now and when I walk by it I just pull out the eeprom card, it resets automatically , loads the onboard eeprom ,runs that . Push the board back in and it resets and runs that.

    I'll order some of those oscillators from digi-key and see if I can bring the video back up - I was dreading either ripping off the old prop or unsoldering all the connectors on the protoboard. If anyone wants to piggyback an order let me know and I'll order a few more. Most likely i'll place the order Tuesday afternoon.

    Thanks for bringing this up.

    Pete
  • Beau SchwabeBeau Schwabe Posts: 6,416
    edited 2008-03-24 - 16:37:22
    One thing I might point out, and this is true with just about any reference stated within a datasheet. There is almost always a de-rating factor applied to the values you see. This de-rating factor is designed to increase product yield and relates to the marginal percentage of products that will work within the specified conditions. Not all components are equal (Propeller chips included), and you may have some that really stand out in a crowd, in this case operating at a frequency much higher than what is stated. For these oddball components it is simply a matter of using them at your own risk.

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    [url=mailto:bschwabe@parallax.com]Beau Schwabe[/url]

    IC Layout Engineer
    Parallax, Inc.


    Beau Schwabe --- Robotics applications- PCB design, embedded software, and mechanical
    Oklahoma Robotics -

    www.Kit-Start.com - bschwabe@Kit-Start.com ෴෴ www.BScircuitDesigns.com - icbeau@bscircuitdesigns.com ෴෴

  • RaymanRayman Posts: 9,716
    edited 2008-03-24 - 20:11:17
    Do anyone know what fails and why at higher frequencies? Is it thermal? Or, is it propogation delay and/or rise/fall times that limit things?
    Prop Info and Apps: http://www.rayslogic.com/
  • Mike GreenMike Green Posts: 22,917
    edited 2008-03-24 - 20:21:31
    There was some discussion in the forum of this during the testing for the formal datasheet. I believe the flags become unreliable first. Read the datasheet. It has a graph showing the maximum clock frequency in relation to supply voltage and temperature. The best speeds occur at higher supply voltages (below the point of damage to the chip) and when the chip is refrigerated.

    It probably is related to propagation delays through some of the longer paths on the chip.
  • RaymanRayman Posts: 9,716
    edited 2008-03-24 - 23:15:15
    I guess it is something thermal then... Didn't think it was because I never felt the chip get hot... Maybe just some small part of it goes into thermal runaway...
    Prop Info and Apps: http://www.rayslogic.com/
  • Paul BakerPaul Baker Posts: 6,351
    edited 2008-03-24 - 23:27:40
    It's not thermal issues, the chip doesn't fry when you overclock it. What is happening is the window in which current·can flow (a clock cycle) becomes so short that the parasitic capacitance cannot be overcome in the clock window. This is because all real sources have a characteristic impedance (an ideal voltage source has 0 resistance), this resistance along with the parasitic capacitance associated with the traces and transistor gates creates a low pass filter. This creates a bit error which leads to unpredictable behavior. I witnessed this while characterizing the chip. 80% of the time when it failed during overclock the display used to determine correct behavior would randomly change the colors and·patterns and would occasionally go into a scrolling behavior. Elements which have high connectivity are the most susceptable because they have the highest parasitic capacitance. A flag is considered a highly connected element because there are many sources (the adder, the shifter and any other structure which uses the flag as an input or output).

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    [url=mailto:pbaker@parallax.com]Paul Baker[/url]
    Propeller Applications Engineer

    Parallax, Inc.

    Post Edited (Paul Baker (Parallax)) : 3/24/2008 11:39:11 PM GMT
  • RaymanRayman Posts: 9,716
    edited 2008-03-25 - 00:53:11
    Ok, that makes sense. But, it is a function of temperature, as you've shown. So, I suppose the temperature affects the resistance of the "voltage source"?
    Prop Info and Apps: http://www.rayslogic.com/
  • Paul BakerPaul Baker Posts: 6,351
    edited 2008-03-25 - 01:13:58
    Correct, in this case the source is via the channel of a PMOS or NMOS transistor depending on the state, this channel has an associated resistance since its a semiconductor. When the substrate is heated the semiconductor lattice vibrates more. This vibration causes more random interactions with passing electrons. This additional random force ends up resisting the flow of electrons in both conduction and valence bands and is seen on the macroscope level as a higher resistance.

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    [url=mailto:pbaker@parallax.com]Paul Baker[/url]
    Propeller Applications Engineer

    Parallax, Inc.
  • RaymanRayman Posts: 9,716
    edited 2008-03-25 - 01:33:27
    Ok. So it's basically a rise/fall time of the logic limitation, right?

    Post Edited (Rayman) : 3/25/2008 12:29:07 PM GMT
    Prop Info and Apps: http://www.rayslogic.com/
  • Paul BakerPaul Baker Posts: 6,351
    edited 2008-03-25 - 01:37:45
    Yup

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    [url=mailto:pbaker@parallax.com]Paul Baker[/url]
    Propeller Applications Engineer

    Parallax, Inc.
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