Counters and traditional PLLs
stevenmess2004
Posts: 1,102
I am currently studying PLLs at tafe and have some questions about the timers.
Am I correct that in the PLL modes the output comes straight from the PLL which is linked to bit 31 of PHSA? This means that (ignoring the 160MHz limit) we can get 40MHz*16=640MHz out.
In traditional plls you have a
Is this correct and is there an easy way to describe what is in the [noparse][[/noparse]?] block? Does anyone know how fast the PLL responds? It also seems like it would be useful to be able to hook the output of one timer to the input of another (like using one of the logic modes) to help generate more frequencies without glitches. Can this be done?
Edit: forum ate the spaces. lets hope its fixed now...
I have Andre's book on order so if all of the answers are in there than don't worry about a reply if you don't want to
These questions are mainly because I have been reading a lot of the old threads that were talking about some of this stuff.
Am I correct that in the PLL modes the output comes straight from the PLL which is linked to bit 31 of PHSA? This means that (ignoring the 160MHz limit) we can get 40MHz*16=640MHz out.
In traditional plls you have a
[noparse][[/noparse]phase comparator]->---[noparse][[/noparse]filter/amp]--->----[noparse][[/noparse]vco]---->-output . | | . | | . ---<-----[noparse][[/noparse]divide by N]--------------<--- From the picture that deSilva posted what is in the propeller is (in PLL mode) [noparse][[/noparse]system clock]------[noparse][[/noparse]?]-------[noparse][[/noparse]phase comparator]-----[noparse][[/noparse]vco]---[noparse][[/noparse]/1 or 2 or 4 or 8 or 16]---output . | | . | | . ----[noparse][[/noparse]/16]------------
Is this correct and is there an easy way to describe what is in the [noparse][[/noparse]?] block? Does anyone know how fast the PLL responds? It also seems like it would be useful to be able to hook the output of one timer to the input of another (like using one of the logic modes) to help generate more frequencies without glitches. Can this be done?
Edit: forum ate the spaces. lets hope its fixed now...
I have Andre's book on order so if all of the answers are in there than don't worry about a reply if you don't want to
These questions are mainly because I have been reading a lot of the old threads that were talking about some of this stuff.
Comments
a) Yes you can couple timers by pins - see my example in Mosquito's thread the other day
(Edit: But it will ALWAYS be synched by the system clock!
Look: The counters do nothing but conditionally(!) add FRQ to PHS each system clock. Period!)
b) The PLL is rated to work between 4 and 8 Mhz only, giving you 64 to 128 MHz or a fraction of it
The reason for such constraints is that it's electrical basis is a VCO, which of course has a max voltage... and it does not work very linear at lower voltages
Post Edited (deSilva) : 3/7/2008 12:31:30 PM GMT
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Paul Baker
Propeller Applications Engineer
Parallax, Inc.
I think the VCO will be enabled in mode 1,2,3 only!
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Paul Baker
Propeller Applications Engineer
Parallax, Inc.
The input clock (80MHz) gets divided down by 2^32/FRQx, but, this only comes out exactly when only a single bit is set (ie it is 2^y where y is an integer).
This may be a problem as the only value for y that will get in the limits is 28 which will give 5MHz into the PLL and 80MHz out.
I presume that the PLL averages (filters) the input (bit 31 of PHSx) and therefore has a limited bandwidth. Does anyone know what this is or maybe the period of time over which an average is taken? This will affect what values of FRQx (specifically values that are not powers of 2) can be used without affecting the stability or introducing glitches.
-Phil
Phil, do you know how hard these rf synthesisers are to hook up, where I can look for them and how much they cost?
Post Edited (statemachine) : 3/9/2008 2:09:34 PM GMT
http://www.silabs.com/public/documents/tpub_doc/dsheet/Timing/Frequency_Control/en/si570.pdf
The chip is rather expensive in quantities of one, however. Actually, its rather expensive, period.
It would be nice to see some schematics for successfully dealing with spurs and phase jitter from the NCO. I'm currently experimenting with using a crystal as a series resonant element connected directly to the output pin of a counter. The problem with this approach is that it severely limits the range of frequency available, and crystals are expensive for VHF. I don't know if overtone crystals will work at all. The approach does allow narrow-band fsk at HF, though.