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I2C Signal Line Pull-up requirements — Parallax Forums

I2C Signal Line Pull-up requirements

Sens-a-DatSens-a-Dat Posts: 44
edited 2008-02-05 14:54 in BASIC Stamp
All,

I need some clarification between what I read in documentations and what I witness on the BASIC Stamp schematics.

The issue is whether pull-up resistors are required for both the the SCLK and SDAT lines for I2C devices. According to both the BASIC Stamp Syntax and Reference Manual I2CIN command reference pages and Column 85 of Nuts and Volts (www.parallax.com/dl/docs/cols/nv/vol3/col/nv85.pdf), both lines should have a pull-up resistors of 4.7K to Vdd. However, when reviewing the BASIC Stamp schematics, there is only a pull-up resistor on SDAT and not SLCK.

The last thing I wish to do is design the PCB wrong, or mess up my breadboard test.

I am trying to understand why this difference exist, and what is the best practice. Sometimes requirements change and maybe the schematics and actual BASIC Stamp boards represent the current best practice/theory.

Gary

Comments

  • Bruce BatesBruce Bates Posts: 3,045
    edited 2008-02-05 04:25
    Sens-A-Dat -

    As far as I am aware, the pull-up resistors are required. Please remember when you are looking at a Stamp schematic, there is already a microprocessor on there (PIC or Scenix) and that might well have pull-up resistors internal to the chip, which you won't see in a schematic.

    Regards,

    Bruce Bates

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  • Sens-a-DatSens-a-Dat Posts: 44
    edited 2008-02-05 04:45
    Yes, Bruce, you have a good point about the internal pull-up resistors that can be used internally of the microprocessors. Reviewing the data sheets for the microprocessors indicate internal pull-up resistors for both lines.

    Knowing this, why would one still place a pull-up on the BASIC Stamp module for only the SDAT line and not the SCLK line?

    It is interesting to understand new things.

    Thanks again,
    Gary
  • Bruce BatesBruce Bates Posts: 3,045
    edited 2008-02-05 04:57
    Gary -

    Having a pull-up resistor on a given pin port is just one of a number of options which may be available. Not every option is available on every pin port.

    Let's suppose, for argument's sake, that one of the pin ports being used on the PIC had that pull-up option available, and the other didn't. You save one external part by turning the option on, on the pin port that has it. The other must be provided for external to the chip.

    Please realize this is purely conjecture on my part. Only Parallax, who programmed the PIC (or Scenix) chip, can give you the real answer.

    Regards,

    Bruce Bates

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    There is no pleasure in having nothing to do;
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  • Mike GreenMike Green Posts: 23,101
    edited 2008-02-05 05:18
    The same issue comes up with the Propeller. Because there is only one possible master on the I2C bus in this situation, only the master will drive the SCLK line and the master can provide both high and low levels without a pullup (which is what Parallax does). The SDAT line can be driven by the master or the slave and an I2C slave assumes that there's a pullup, so there has to be one provided.
  • Tracy AllenTracy Allen Posts: 6,666
    edited 2008-02-05 05:42
    Gary,

    In I2C protocol the sda line shifts back and forth as data and acknowledge pulses go both directions. In contrast, in _most_ I2C slave devices, the scl line is always an input and never an output. When that is true, the master device can drive that line both high and low and the circuit can forego that one pull-up resistor.

    However, it is not always true, and the I2C protocol allows a slave to use a mechanism called "clock hold" to indicate to the master that it is busy. The slave holds the clock line low and releases it only when it is okay for the master to continue. I have an analog to digital converter that does that--the conversion is finished when the slave releases the clock line. In that case, the pull-up resistor is mandatory in order to allow the bidirectional exchange.

    The I2CIN and I2COUT commands on the Stamp do in fact respect the possibility of clock hold, so both pull-ups are mandatory. That is I2C on pins {p0, p1}, {p8,p9}, {x0,x1} and {x8, x9}.

    You noticed that the Stamp eeprom that holds the PBASIC program does not have a pull-up on the sck line. I2C eeprom does not use clock hold, and since those Stamp pins are dedicated completely to that memory, the Stamp simply drives the sck both high and low.

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    Tracy Allen
    www.emesystems.com
  • ZootZoot Posts: 2,227
    edited 2008-02-05 14:54
    I'd like to add one more point -- internal pull-ups are generally "weak" -- perhaps too weak for I2C in a noisy environment. The general spec is 4.7k pullups as the best trade-off between speed and immunity. Speed is affected because the smaller the value of the resistor, the longer it will take for the pulses on SDA/SCL to transition from high-to-low (or vice versa).

    When running I2C at higher speeds, higher value pull-ups are needed to allow the pulses to be clean and quick. However, the higher the value of the pullups, the more prone the lines are to picking up noise. On the Stamps, the I2C speed is about 50khz -- so 4.7k down to 1.8k will be fine. I usually use 4.7k unless the platform is very noisy, then I use 2.2k or 1.8k.

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