I2C Signal Line Pull-up requirements
Sens-a-Dat
Posts: 44
All,
I need some clarification between what I read in documentations and what I witness on the BASIC Stamp schematics.
The issue is whether pull-up resistors are required for both the the SCLK and SDAT lines for I2C devices. According to both the BASIC Stamp Syntax and Reference Manual I2CIN command reference pages and Column 85 of Nuts and Volts (www.parallax.com/dl/docs/cols/nv/vol3/col/nv85.pdf), both lines should have a pull-up resistors of 4.7K to Vdd. However, when reviewing the BASIC Stamp schematics, there is only a pull-up resistor on SDAT and not SLCK.
The last thing I wish to do is design the PCB wrong, or mess up my breadboard test.
I am trying to understand why this difference exist, and what is the best practice. Sometimes requirements change and maybe the schematics and actual BASIC Stamp boards represent the current best practice/theory.
Gary
I need some clarification between what I read in documentations and what I witness on the BASIC Stamp schematics.
The issue is whether pull-up resistors are required for both the the SCLK and SDAT lines for I2C devices. According to both the BASIC Stamp Syntax and Reference Manual I2CIN command reference pages and Column 85 of Nuts and Volts (www.parallax.com/dl/docs/cols/nv/vol3/col/nv85.pdf), both lines should have a pull-up resistors of 4.7K to Vdd. However, when reviewing the BASIC Stamp schematics, there is only a pull-up resistor on SDAT and not SLCK.
The last thing I wish to do is design the PCB wrong, or mess up my breadboard test.
I am trying to understand why this difference exist, and what is the best practice. Sometimes requirements change and maybe the schematics and actual BASIC Stamp boards represent the current best practice/theory.
Gary
Comments
As far as I am aware, the pull-up resistors are required. Please remember when you are looking at a Stamp schematic, there is already a microprocessor on there (PIC or Scenix) and that might well have pull-up resistors internal to the chip, which you won't see in a schematic.
Regards,
Bruce Bates
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
There is no pleasure in having nothing to do;
the fun is in having lots to do, and not doing it!
Knowing this, why would one still place a pull-up on the BASIC Stamp module for only the SDAT line and not the SCLK line?
It is interesting to understand new things.
Thanks again,
Gary
Having a pull-up resistor on a given pin port is just one of a number of options which may be available. Not every option is available on every pin port.
Let's suppose, for argument's sake, that one of the pin ports being used on the PIC had that pull-up option available, and the other didn't. You save one external part by turning the option on, on the pin port that has it. The other must be provided for external to the chip.
Please realize this is purely conjecture on my part. Only Parallax, who programmed the PIC (or Scenix) chip, can give you the real answer.
Regards,
Bruce Bates
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
There is no pleasure in having nothing to do;
the fun is in having lots to do, and not doing it!
In I2C protocol the sda line shifts back and forth as data and acknowledge pulses go both directions. In contrast, in _most_ I2C slave devices, the scl line is always an input and never an output. When that is true, the master device can drive that line both high and low and the circuit can forego that one pull-up resistor.
However, it is not always true, and the I2C protocol allows a slave to use a mechanism called "clock hold" to indicate to the master that it is busy. The slave holds the clock line low and releases it only when it is okay for the master to continue. I have an analog to digital converter that does that--the conversion is finished when the slave releases the clock line. In that case, the pull-up resistor is mandatory in order to allow the bidirectional exchange.
The I2CIN and I2COUT commands on the Stamp do in fact respect the possibility of clock hold, so both pull-ups are mandatory. That is I2C on pins {p0, p1}, {p8,p9}, {x0,x1} and {x8, x9}.
You noticed that the Stamp eeprom that holds the PBASIC program does not have a pull-up on the sck line. I2C eeprom does not use clock hold, and since those Stamp pins are dedicated completely to that memory, the Stamp simply drives the sck both high and low.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Tracy Allen
www.emesystems.com
When running I2C at higher speeds, higher value pull-ups are needed to allow the pulses to be clean and quick. However, the higher the value of the pullups, the more prone the lines are to picking up noise. On the Stamps, the I2C speed is about 50khz -- so 4.7k down to 1.8k will be fine. I usually use 4.7k unless the platform is very noisy, then I use 2.2k or 1.8k.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
When the going gets weird, the weird turn pro. -- HST
1uffakind.com/robots/povBitMapBuilder.php
1uffakind.com/robots/resistorLadder.php