SPI Bit Banging
Has anyone been succesful with bit banging SPI on the stamp? I need simultaneous 2 way communication on MISO and MOSI so SHIFTIN/SHIFTOUT won't work for me. Here is what I've tried so far:
Spi:
recv_byte = 0
LOW pgm_sck
FOR i = 0 TO 7
' set MSB to MOSI pin
p = send_byte & $80
IF p <> 0 THEN
HIGH pgm_mosi
ELSE
LOW pgm_mosi
ENDIF
' shift to next bit
send_byte = send_byte << 1
' receive data
recv_byte = recv_byte << 1
p = IN10
IF p = 1 THEN
recv_byte = recv_byte + 1
ENDIF
PULSOUT pgm_sck, spi_pulse_length ' ??? what should the pulse length be ???
'HIGH pgm_sck
'PAUSE 2 ' ??? how long
'LOW pgm_sck
'PAUSE 2 ' ??? how long
NEXT
RETURN

Comments
The PBASIC Stamp is single-threaded, and executes one instruction at a time, so simultaneous anything just can not be done. On the other hand, that may not be necessary.
What device are you using that claims that simultaneous read/write access is required? In my experience, it's usually an option rather than a requirement, and in that case MISO and MOSI can often be connected together. This sometimes requires a resistor or a diode, but this can be the circumvention.
Regards,
Bruce Bates
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I am attempting to make a serial AVR ISP programmer that simulate the AVR910 protocol. It requires simultaneous MISO/MOSI. And yes I am acutely aware of the BS2 limitations -- figured if the clock pulsing where slow enough it would be possible.