I'm studying the hypothesis of creating a system integrating two, or even four, P2 chips. My idea is to seamlessly emulate a 16 or 32-core MCU. Power delivery is not an issue (it is easy for me to design DC-DC converter modules that are able to supply 5A or more). Also, I'm expecting to design the clock distribution system so that the chips can be clocked simultaneously. Probably I'll have to disable the PLL on the chips, and clock them directly (300MHz or more, if possible). I'll implement active heat sinking, of course.
As for the power delivery, I'll supply 12V to the system, that will be down-converted to 3.3V and 1.8V to the chips. The DC-DC converter for 1.8V will have to be beefy, for sure. The 3.3V will probably be supplied by a very low noise DC-DC converter, as local LDOs are not really needed (except for any pins that are to be analog in nature).
My question is, what pins have to be connected to integrate both (or four) chips into a single 16-core (or 32-core) emulated MCU?
Kind regards, Samuel Lourenço