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Help with BS2 and 74HCxx logic! — Parallax Forums

Help with BS2 and 74HCxx logic!

I have decided to write up a PBASIC 2.5 program to identify different logic gates. IT DOESNT WORK!! I think I am having issues reading the input. I have tested with a 74hc02 NOR chip, got a test failure in debug three times. the fourth time, it identified the chip as a NAND gate. I ahve tested the gate by hand, so I know that it is indeed a functioning NOR gate. Here is the code and the output from debug when it thought it had a NAND gate.

Code:
' {$STAMP BS2}
' {$PBASIC 2.5}

AndGate       VAR Bit                            'Declare variables for gate IDs
OrGate        VAR Bit
XorGate       VAR Bit
NandGate      VAR Bit
NorGate       VAR Bit
XnorGate      VAR Bit
NotGate       VAR Bit

Main:
  DEBUG CLS, "Logic Tester ready."
  PAUSE 250
  AndGate = 1                                    'Set all variables high, eliminate them as we go.
  OrGate = 1
  XorGate = 1
  NandGate = 1
  NorGate = 1
  XnorGate = 1
  NotGate = 1
  DEBUG CR, "Testing gate..."

  LOW 0                                          'Set both outputs LOW, eliminate different gates by their outputs.
  LOW 1

  DEBUG CR, BIN IN2                              'Each IF..THEN block has a DEBUG statement to give the gate output as read by IN2.
  IF IN2 = 0 THEN
    NandGate = 0
    NorGate = 0
    XnorGate = 0
    NotGate = 0
  ELSEIF IN2 = 1 THEN
    AndGate = 0
    OrGate = 0
    XorGate  = 0
  ENDIF

  HIGH 0                                         'Set the first output HIGH, eliminate different gates by their outputs.

  DEBUG CR, BIN IN2
  IF IN2 = 0 THEN
    OrGate = 0
    XorGate  = 0
    NandGate = 0
  ELSEIF IN2 = 1 THEN
    AndGate = 0
    NorGate = 0
    XnorGate = 0
    NotGate = 0
  ENDIF

  LOW 0                                          'Set the first output LOW and the second output HIGH, eliminate different gates by their outputs.
  HIGH 1

  DEBUG CR, BIN IN2
  IF IN2 = 0 THEN
    OrGate = 0
    XorGate  = 0
    NandGate = 0
    NotGate = 0
  ELSEIF IN2 = 1 THEN
    AndGate = 0
    NorGate = 0
    XnorGate = 0
  ENDIF
                                                 'Set the first output HIGH, eliminate different gates by their outputs.
  HIGH 0

  DEBUG CR, BIN IN2
  IF IN2 = 0 THEN
    AndGate = 0
    OrGate = 0
    XnorGate = 0
  ELSEIF IN2 = 1 THEN
    XorGate  = 0
    NorGate = 0
    NandGate = 0
    NotGate = 0
  ENDIF

  DEBUG CR, "Gate test complete. "
  IF AndGate + OrGate + XorGate  + NorGate + XnorGate + NandGate + NotGate = 1 THEN      'If the test was successful, then only one variable will still be 1.
    DEBUG "The gate was successfully identified as a "
    IF AndGate = 1 THEN                          'Declare the results of the test, tell which gate was still in.
      DEBUG "AND"
    ELSEIF OrGate = 1 THEN
      DEBUG "OR"
    ELSEIF XorGate = 1 THEN
      DEBUG "XOR"
    ELSEIF NorGate = 1 THEN
      DEBUG "NOR"
    ELSEIF XnorGate = 1 THEN
      DEBUG "XNOR"
    ELSEIF NandGate = 1 THEN
      DEBUG "NAND"
    ELSEIF NotGate = 1 THEN
      DEBUG "NOT"
    ENDIF
    DEBUG " gate."
  ELSE
    DEBUG "The device failed to identify the gate."        'If there was more than one gate still in, or if they were all out, then the test failed.
  ENDIF

  DEBUG CR, "Reset device to perform another test.", CR, DEC AndGate, CR, DEC OrGate, CR, DEC XorGate, CR, DEC NorGate, CR, DEC XnorGate,
        CR, DEC NandGate, CR, DEC NotGate                  'Give the closing message and show the results of all the gates.

  END

Debug:
Logic Tester ready.
Testing gate...
1
1
1
1
Gate test complete. The gate was successfully identified as a NAND gate.
Reset device to perform another test.
0
0
0
0
0
1
0

I notice that the block which singles out the gates by their results works, but IN2 tends to read high. Should I maybe have a 200ohm pulldown resistor on P2?

Comments

  • BeanBean Posts: 8,129
    You can test for common gate types by setting a variable to zero then adding a value depending on the output of the gate with various inputs:

    00 = (add 1 if high)
    01 = (add 2 if high)
    11 = (add 4 if high)

    Then look at the value of the variable:
    0 = Stuck Low
    1 = NOR
    2 = XOR
    3 = NAND
    4 = AND
    5 = XNOR
    6 = OR
    7 = Stuck High

    Bean
  • kwinnkwinn Posts: 8,697
    I'm assuming you are referring to all the quad 2 input gates (01, 02, 03, etc) with 14 pins. In that case I would suggest two output bits, each connected in parallel to the 4 inputs of the gate (I/O 0 to pins 2, 5, 8, 11, I/O 1 to 3, 6, 9, 12) and inputting the 4 outputs of the gates as a nibble. That way you can test all the gates at once, see which if any may be defective, and determine the type of gate based on the majority results.
  • tomcrawfordtomcrawford Posts: 1,126
    edited 2019-07-17 15:25
    Here are the five quad 2-input gate packages:
    AND: 74x08
    NAND: 74x00
    OR: 74x32
    NOR: 74x02 *Pinout not the same as other four
    XOR: 74x86

    Be very careful to note the 02 has a unique pinout. That bit any number of old-school logic board designers in the 70s.
  • What’s the high/low threshold for BS2 input?
  • 1.4V is the threshold. Below that is a zero, above that is a one.
  • So, I will measure the voltage between the gate and BS2. I think the gates may not be sinking their output properly.
  • A schematic and detailed photo might be interesting.
  • Okay, I'm assuming pin 1 is at the bottom right; the notch is at the bottom.

    Power to the gate pack is correct. You say it is an x02 so the output is pin 13 (light blue wire), connected to BS2 pin 2.

    You are applying inputs on 11 and 12; good so far.

    I would connect pin 13 to a LED (through a, say 1K, resistor) (disconnect BS2 pin 2). Now exercise the gates inputs and see that the gate works correctly (either high makes a low). If not, you have killed the gate. If so, you got a bug in your program.
  • I have a little breadboard with switches and LEDs on it. The gate works with this.

    LEDs:

    In>--[+LED-]--{Gnd}

    Switches:

    In>--[220]--|--[10k]--{Gnd}
    |--[Switch]--{5v}
  • Okay, now make sure it works in your picture when controlled by the BS-2.
  • Confirmed that the gate functions. Also confirmed that the pin does pull low. Going to test another gate tomorrow with the original code. Then I'll debug it.
  • I will add a 50ms delay between setting the gates and reading them. It's possible that I am reading the output before it can go low.
  • tomcrawfordtomcrawford Posts: 1,126
    edited 2019-07-22 13:07
    TTL and modern CMOS gates have propagation delays measured in nanoseconds.
  • AwesomeCronk,

    Have you looked at any of the datasheets?

    Voltage levels, timing values, pin numbers and functions, etc are all there.
  • So, I will measure the voltage between the gate and BS2. I think the gates may not be sinking their output properly.

    Awesome, are you able to scope IN2 to see if it is actually being driven correctly by the device under test?

    Most logic devices can sink current up to a couple tens of mA, and that's noted as Iol on the respective datasheet. However, the drive high current (Ioh) is typically a few hundred uA. I wonder if IN2 is in a state that is sinking all that current and not allowing the device under test output to rise to its Voh.
  • AwesomeCronkAwesomeCronk Posts: 1,055
    edited 2019-07-23 13:00
    Well, the device is actually working, that was confirmed by LEDs. But when the test code was run the last time, it showed that each time the stamp read IN2 it was indeed stuck HIGH. Testing the gate driven by stamp pins, reading with a multimeter, I found that high was about 4.9-5.1 volts(I don’t remember), and that low was about 2.1 millivolts. I think IN2 may have been damaged, so next time I’m on the laptop I’ll switch over to another pin and add a 220ohm in series or as pull down. Wiring experts have any idea which?
  • AwesomeCronk,

    I assume you are giving the logic chips 5V and what are you doing with the unused pins?
  • If the BS2 is not driving a pin, the input impedance is effectively infinite. Any gate package totem-pole output known to man can drive it.

    If the BS2 is driving a pin HIGH (or LOW) it is either because the BS2 is broken or it is being programmed to drive that pin. My money would always be on the programmed case. Oftentimes programs left over in the PROM from earlier projects have unexpected consequences. Write and download a little program so that you know what the BS2 is supposed to do. For example
    END
    
  • Unused pins on the 74hcxx chips are left to float, as they are not related. The BS2 is not driving the pin, but it only reads high. I am not on the laptop, which has the code and editor, so I cannot experiment right now.
  • AwesomeCronk,

    Are your logic chips Chinese clones or older name brand?
  • Cluso99Cluso99 Posts: 18,066
    Input pins on unused logic should always be tied, not floated. Some 74 series need pullup or pulldown resistors, not tied directly to GND or VCC. You need to check the specs for the series used.
  • I have a collection of chips, including Texas, HLF, Philips, Japan, Philips Thailand.
  • Could I gang them onto one resistor?
  • kwinnkwinn Posts: 8,697
    You could do what I suggested in an earlier post and connect the two outputs that go to the 74xx inputs to all 4 gates in parallel. That way no input is floating and you can use 4 input pins to read all 4 gate outputs, or a single input to test 1 gate. If you are short of I/O pins you could always put leds on the outputs to visually determine if each gate is working since all 4 leds should be on or off at the same time.
  • tomcrawfordtomcrawford Posts: 1,126
    edited 2019-07-24 16:22
    Cluso is correct in that good engineering practice dictates that the inputs of unused gates be controlled. A single pull-whichever 1K resistor would be fine in this case. We always used separate resistors because it made it possible easier to use the previously unused gate(s) if it proved needful. That said, I don't think it will make any difference in this case. The gates really are pretty much separate.
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