TAQOZ - Tachyon Forth for the P2 BOOT ROM

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Comments

  • FredBlaisFredBlais Posts: 365
    edited 2019-03-03 - 16:57:56
    I'm mostly done with my smartpin SPI driver.
    there is 8 different modes
    CLOCK POLARITY [0/1]
    CLOCK PHASE [0/1]
    MSB TX/RX FIRST OR LSB TX/RX FIRST

    When CPOL is 0, the clock signal is normally low and is driven up/down on each pulse
    When CPOL is 1, the clock signal is normally high and is driven down/up on each pulse
    When CPHA is 0, the data bit is ready before the first edge and is setup on the second edge
    When CPHA is 1, the data bit is setup on the first edge and read/written on the second edge

    To be able to make the CPHA to work, I had to setup synchronous serial transmit to 9 bits, because the way the synchronous serial works, LSB is always present on the output pin before any clock when the smartpin is activated with DIR set to 1

    I also setup MOSI to 100uA drive mode. Some SPI chips have their MOSI/MISO tied together inside the IC (SIO) so this allow me to short the MOSI and MISO and SIO pin together on the Prop and SPI slave. When data is written to the slave, MISO and SIO are tri-stated so the MOSI can drive both input. When the slave starts to write data to the prop, SIO drive is stronger than the MOSI drive so MISO can effectively read the slave. See the test below.
    8 := CLK
    9 := MOSI
    10 := MISO
    11 := SS
    15000 := FREQ
    CLKHZ FREQ / := N_PULSES
    N_PULSES 2/ 16 << N_PULSES OR := CLK_PULSE_TIME
    %0000_0_0_0_000_000 8 << %1_00100_0 OR := CPOL0
    %0000_0_0_1_000_000 8 << %1_00100_0 OR := CPOL1
    
    : SPI_CLK_SETUP ( MODE -- ) CLK PIN WRPIN CLK_PULSE_TIME WXPIN L ;
    
    : CPOL0_CPHA1_SETUP
      CPOL0 SPI_CLK_SETUP
      MOSI PIN %0000_0111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_1110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %100111 WXPIN
    ;
    
    
    : CPOL1_CPHA1_SETUP
      CPOL1 SPI_CLK_SETUP
      MOSI PIN %0000_1111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_0110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %100111 WXPIN
    ;
    
    : CPOL0_CPHA0_SETUP
      CPOL0 SPI_CLK_SETUP
      MOSI PIN %0000_1111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_0110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %000111 WXPIN
    ;
    
    
    : CPOL1_CPHA0_SETUP
      CPOL1 SPI_CLK_SETUP
      MOSI PIN %0000_0111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_1110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %000111 WXPIN
    ;
    
    
    : SEND_CPHA1_MSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F REV 23 >> WYPIN L
      MISO PIN L
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F REV
    ;
    
    : SEND_CPHA0_MSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F REV 24 >> WYPIN L
      MISO PIN L
      N_PULSES 4/ WAITX
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F REV
    ;
    
    : SEND_CPHA1_LSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F 2* WYPIN L
      MISO PIN L
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F 24 >>
    ;
    
    : SEND_CPHA0_LSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F WYPIN L
      MISO PIN L
      N_PULSES 4/ WAITX
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F 24 >>
    ;
    

    test with DS1302 SPI RTC
     ---  ok-- DS1302 RTC + 31 BYTES RAM TEST
    
     ---  ok-- SETUP CLOCK POLARITY, PHASE AND LSB TRANSMIT FIRST
    TAQOZ# : SEND SEND_CPHA0_LSB ; ---  ok
    TAQOZ# CPOL0_CPHA0_SETUP ---  ok
    
     ---  ok-- CLEAR WRITE-PROTECT BIT
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $8E SEND .BYTE --- 8E ok
    TAQOZ# $00 SEND .BYTE --- 00 ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- WRITE $AA TO FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C0 SEND .BYTE --- C0 ok
    TAQOZ# $AA SEND .BYTE --- AA ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- WRITE $BB TO 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C2 SEND .BYTE --- C2 ok
    TAQOZ# $BB SEND .BYTE --- BB ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- READ FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C1 SEND .BYTE --- C1 ok
    TAQOZ# $00 SEND .BYTE --- AA ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- READ 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C3 SEND .BYTE --- C3 ok
    TAQOZ# $00 SEND .BYTE --- BB ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- SET WRITE-PROTECT BIT
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $8E SEND .BYTE --- 8E ok
    TAQOZ# $FF SEND .BYTE --- FF ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- TRY TO WRITE $CC TO FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C0 SEND .BYTE --- C0 ok
    TAQOZ# $CC SEND .BYTE --- CC ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- TRY TO WRITE $DD TO 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C2 SEND .BYTE --- C2 ok
    TAQOZ# $DD SEND .BYTE --- DD ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
     
    ---  ok-- READ FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C1 SEND .BYTE --- C1 ok
    TAQOZ# $00 SEND .BYTE --- AA ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- READ 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C3 SEND .BYTE --- C3 ok
    TAQOZ# $00 SEND .BYTE --- BB ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#
    

    @Peter Jakacki could you help me a little bit with cleaning my driver source code so that there is a bit less copy/pasted code. I'm not too sure how to approach that and your Forth code always look simpler :)

    Source code : https://github.com/speccy88/TAQOZ/blob/master/src/forth/protocol/SPI.FTH
  • MJBMJB Posts: 1,049
    edited 2019-03-04 - 21:03:51
    FredBlais wrote: »
    I'm mostly done with my smartpin SPI driver.
    there is 8 different modes
    CLOCK POLARITY [0/1]
    CLOCK PHASE [0/1]
    MSB TX/RX FIRST OR LSB TX/RX FIRST

    When CPOL is 0, the clock signal is normally low and is driven up/down on each pulse
    When CPOL is 1, the clock signal is normally high and is driven down/up on each pulse
    When CPHA is 0, the data bit is ready before the first edge and is setup on the second edge
    When CPHA is 1, the data bit is setup on the first edge and read/written on the second edge

    To be able to make the CPHA to work, I had to setup synchronous serial transmit to 9 bits, because the way the synchronous serial works, LSB is always present on the output pin before any clock when the smartpin is activated with DIR set to 1

    I also setup MOSI to 100uA drive mode. Some SPI chips have their MOSI/MISO tied together inside the IC (SIO) so this allow me to short the MOSI and MISO and SIO pin together on the Prop and SPI slave. When data is written to the slave, MISO and SIO are tri-stated so the MOSI can drive both input. When the slave starts to write data to the prop, SIO drive is stronger than the MOSI drive so MISO can effectively read the slave. See the test below.
    8 := CLK
    9 := MOSI
    10 := MISO
    11 := SS
    15000 := FREQ
    CLKHZ FREQ / := N_PULSES
    N_PULSES 2/ 16 << N_PULSES OR := CLK_PULSE_TIME
    %0000_0_0_0_000_000 8 << %1_00100_0 OR := CPOL0
    %0000_0_0_1_000_000 8 << %1_00100_0 OR := CPOL1
    
    : SPI_CLK_SETUP ( MODE -- ) CLK PIN WRPIN CLK_PULSE_TIME WXPIN L ;
    
    : CPOL0_CPHA1_SETUP
      CPOL0 SPI_CLK_SETUP
      MOSI PIN %0000_0111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_1110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %100111 WXPIN
    ;
    
    
    : CPOL1_CPHA1_SETUP
      CPOL1 SPI_CLK_SETUP
      MOSI PIN %0000_1111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_0110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %100111 WXPIN
    ;
    
    : CPOL0_CPHA0_SETUP
      CPOL0 SPI_CLK_SETUP
      MOSI PIN %0000_1111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_0110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %000111 WXPIN
    ;
    
    
    : CPOL1_CPHA0_SETUP
      CPOL1 SPI_CLK_SETUP
      MOSI PIN %0000_0111_000_0000_000_101_101 8 << %01_11100_0 OR WRPIN %101000 WXPIN
      MISO PIN %0000_1110_000_0000_000_111_111 8 << %01_11101_0 OR WRPIN %000111 WXPIN
    ;
    
    
    : SEND_CPHA1_MSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F REV 23 >> WYPIN L
      MISO PIN L
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F REV
    ;
    
    : SEND_CPHA0_MSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F REV 24 >> WYPIN L
      MISO PIN L
      N_PULSES 4/ WAITX
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F REV
    ;
    
    : SEND_CPHA1_LSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F 2* WYPIN L
      MISO PIN L
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F 24 >>
    ;
    
    : SEND_CPHA0_LSB ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F WYPIN L
      MISO PIN L
      N_PULSES 4/ WAITX
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F 24 >>
    ;
    

    test with DS1302 SPI RTC
     ---  ok-- DS1302 RTC + 31 BYTES RAM TEST
    
     ---  ok-- SETUP CLOCK POLARITY, PHASE AND LSB TRANSMIT FIRST
    TAQOZ# : SEND SEND_CPHA0_LSB ; ---  ok
    TAQOZ# CPOL0_CPHA0_SETUP ---  ok
    
     ---  ok-- CLEAR WRITE-PROTECT BIT
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $8E SEND .BYTE --- 8E ok
    TAQOZ# $00 SEND .BYTE --- 00 ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- WRITE $AA TO FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C0 SEND .BYTE --- C0 ok
    TAQOZ# $AA SEND .BYTE --- AA ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- WRITE $BB TO 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C2 SEND .BYTE --- C2 ok
    TAQOZ# $BB SEND .BYTE --- BB ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- READ FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C1 SEND .BYTE --- C1 ok
    TAQOZ# $00 SEND .BYTE --- AA ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- READ 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C3 SEND .BYTE --- C3 ok
    TAQOZ# $00 SEND .BYTE --- BB ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- SET WRITE-PROTECT BIT
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $8E SEND .BYTE --- 8E ok
    TAQOZ# $FF SEND .BYTE --- FF ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- TRY TO WRITE $CC TO FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C0 SEND .BYTE --- C0 ok
    TAQOZ# $CC SEND .BYTE --- CC ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- TRY TO WRITE $DD TO 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C2 SEND .BYTE --- C2 ok
    TAQOZ# $DD SEND .BYTE --- DD ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
     
    ---  ok-- READ FIRST RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C1 SEND .BYTE --- C1 ok
    TAQOZ# $00 SEND .BYTE --- AA ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#  ---  ok
    
     ---  ok-- READ 2ND RAM REGISTER
    TAQOZ# SS PIN H ---  ok
    TAQOZ# $C3 SEND .BYTE --- C3 ok
    TAQOZ# $00 SEND .BYTE --- BB ok
    TAQOZ# SS PIN L ---  ok
    TAQOZ#
    

    @Peter Jakacki could you help me a little bit with cleaning my driver source code so that there is a bit less copy/pasted code. I'm not too sure how to approach that and your Forth code always look simpler :)

    Source code : https://github.com/speccy88/TAQOZ/blob/master/src/forth/protocol/SPI.FTH


    When I read this yesterday I thought about replying,
    but Peter will come up with s.th. better anyhow so I didn't.
    Since he did not answer yet now my 2c.

    Considerations are as always: size vs speed vs nice to read ;-)

    I assume speed is not a major concern here since it is only the smartpin setup
    and the actual transmission is independent of it.
    For speed your code is probably a good choice with everything inlined.

    Size:
    it looks at least this code
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F 
    
    is the same in all four so it could be factored out and just called.

    nice to read:
    Having four different mode dependent WORDS might require a case / switch
    somewhere in the calling code dependent on the modes.
    So why not just make the modes config switches implemented e.g. as a
    byte _msb   --- for msb / lsb switching
    1 _msb C!    --- or 0 _msb C!  or ~ ~~ if implemented
    --- if you like with shortcuts
    pub !MSB _msb ~~ ;
    pub !LSB  _msb ~ ;
    pub MSB? _msb C@ ;
    --- and
    byte _cpha   --- for CPHA0/ CPHA1 switching
    0 _cpha  C!  --- or 1 _cpha  C!  or ~ ~~ if implemented
    --- and with shortcuts
    pub CPHA0  0 _cpha   C! ;
    pub CPHA1  1 _cpha   C! ;
    --- or
    pub CPHA!  _cpha   C! ;
    --- so you can write
    0 CPHA!  --- or
    1 CPHA!
    pub CPA0? _cpha  C@ NOT  ;
    
    then it can be made in one
    : SPI!@ ( TX_BYTE -- RX_BYTE ) 
      MOSI PIN F 
      MSB? If REV 24 >> THEN
      CPA0? IF 2* THEN
      WYPIN L
      MISO PIN L
      CPA0? IF   N_PULSES 4/ WAITX THEN
      CLK PIN 8 WYPIN WAITPIN
      MOSI PIN F
      SS PIN H
      MISO PIN RDPIN F 
      MSB? If REV ELSE 24 >> THEN
    ;
    
    I hope I didn't miss a case ...
  • Peter JakackiPeter Jakacki Posts: 8,159
    edited 2019-03-04 - 23:05:46
    @MJB @FredBlais - Hah, I did have a quick look at it yesterday and saw plenty of redundancy but for me I like to "extend" the language rather than write functions. The other thing is that I prefer factoring functions into those words so that they can be arranged into a phrase rather than one long concatenated word but then that phrase can have a name and so becomes another word in the language. Also in my experience it is best to have runtime configuration rather than having to change the source so that we can set the frequency and pins in code.

    BTW @MJB - I can't seem to remember the post you mentioned but I will trawl through the thread and get back to you, sorry.

    This is my quick take on the code so far but this will be refined when I get to have a proper look at it. The transfer functions look too bulky and slow though which means that when you use a much higher transfer frequency it will be bogged down with overhead. This is where the built-in TAQOZ SPI instructions are very efficient and run about 1/10th of the main clock frequency but with almost zero overhead as in writing a byte:
    TAQOZ# $12 LAP SPIWB LAP .LAP --- 136 cycles= 566ns @240MHz ok
    

    Here's where I'm at so far with Fred's code. I'm glad he has taken a look at what's required for SPI bus because to tell the truth I hadn't bothered so far :)
    long _spihz
    pub SPIHZ ( freq -- )	CLKHZ SWAP / DUP 15 << OR _spihz ! ;
    pub !CLK ( 0/1 -- )	14 << $48 OR CLK PIN WRPIN _spihz @ WXPIN L ;
    pub !MOSI ( b27 -- )	27 << MOSI PIN %0000_0111_000_0000_000_101_101 8 << OR %01_11100_0 OR WRPIN %101000 WXPIN ;
    pub !MISO ( bx -- )	DUP 27 << MISO PIN %0000_1110_000_0000_000_111_111 8 << OR %01_11101_0 OR WRPIN %100111 SWAP 5 << OR WXPIN ;
    pub !DAT ( bx -- )	0= DUP !MOSI !MISO ;
    pub !SPI ( clk+dat -- )	DUP 2 AND !CLK 1 AND !DAT ;
    
    {
    Setup examples:
    15000 SPIHZ
    1 !SPI --- Clock Polarity low, phase high
    3 !SPI --- Clock Polarity high, phase high
    0 !SPI --- Clock Polarity low, phase low
    2 !SPI --- Clock Polarity high, phase low
    }
    

    While the smartpin SPI could be useful it might also be of limited use as a master since most peripherals have some lower clock limit anyway but certainly this mode is very useful if the P2 is a slave. However I look forward to being corrected because it means there is a better way :)

    P.S. @FredBlais - I will take another look at using Git since you have set it up so well :)


    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
  • @MJB @Peter Jakacki

    Thanks for your help.

    I was having a little bit of fun yesterday displaying the 5x7 font on an old MAN2A/TIL305 IC
    http://www.decadecounter.com/vta/tubepage.php?item=33
    til3052.jpg
    800 x 638 - 165K
  • MJBMJB Posts: 1,049
    edited 2019-03-05 - 02:24:16
    ...

    BTW @MJB - I can't seem to remember the post you mentioned but I will trawl through the thread and get back to you, sorry.
    ...
    I was refering to Freds post directly above.
    There is lots of Freds code a bit hidden in the scrolling [ code ] box.

    And I only commented on the SEND part, not the SETUP (didn't really study SmartPins yet)
  • @MJB @Peter Jakacki

    I think I'm done with the smartpin SPI driver.
    Ideas from both of you are there!

    https://github.com/speccy88/TAQOZ/blob/master/src/forth/protocol/SPI.FTH
  • I will be busy getting the new P2D2 hardware out this week but in the meantime here is an updated TAQOZ you can loaded onto your SD card. It includes VGA and PS/2 as well as a decompiler which you can use this way:
    TAQOZ# SEE CMD
    
    pub CMD
    2E02: 0070     DUP
    2E04: 2C66     sdcmd
    2E06: 00DB     C!
    2E08: 2D84     SDSPI
    2E0A: 2DC4     SDCLK
    2E0C: 01AF     SPIWC
    2E0E: 01BD     SPIWL
    2E10: 2C66     sdcmd
    2E12: 00D4     C@
    2E14: FC02     IF $2E1A
    2E16: F887       $0087 (135) 
    2E18: 2E1D       GOTO $2E1C 
                   THEN
    2E1A: F895     $0095 (149) 
    2E1C: 01B1     SPIWB
    2E1E: F800     0
    2E20: 0143     $0FA0 (4000) 
    2E24: 0111     FOR
    2E26: 019E       SPIRD
    2E28: 00B4       >B
    2E2A: 0070       DUP
    2E2C: F8FF       $00FF (255) 
    2E2E: 00BF       <>
    2E30: 0124       ?NEXT
    2E32: 0066     DROP
    2E34: 004E     ; ---  ok
    TAQOZ# 
    

    Just rename P2.ROM to _BOOT_P2.BIX and copy to your SD card so it will boot at 115,200 baud. Normally I run mine at 3M, the limit of the USB chip. Take note that MOUNT at present seems a little bit slow since it does an actual cluster scan to check for free and used clusters, but I might change that next time.
    ROM
    64K

    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
  • Great work Peter. Now you can add all those extra features you've always wanted :smiley:

    For P2-EVAL users, if you want to stop the SD from booting, just switch P59^ on (3rd switch). For P2D2 you will need to put a pullup on P59.
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
    Prop OS (also see Sphinx, PropDos, PropCmd, Spinix)
    Website: www.clusos.com
    Prop Tools (Index) , Emulators (Index) , ZiCog (Z80)
  • @Peter Jakacki

    I finally got around to playing with the LED Matrix board. Please remind me how to tell TAQOZ where to find the pins for this board?

    Thanks!
  • @DaveJenson - Here's the current source for the driver and right near the start there you will see:
    --- user can change led display pins on the fly
    pub PLEXPIN ( pin -- )	>!
    pri leds			8 ;
    
    So use PLEXPIN to change the base pin (it actually changes the leds constant .

    This driver assumes the 5X7 FONT is loaded in as part of VGA.FTH
    TAQOZ
    {
    PLEXLED.FTH
    SIMPLE CHARACTER I/O FOR P2-ES LED MATRIX
    228 bytes of code including table
    top view 7 columns x 8 rows
    }
    
    		*** CHARLIEPLEX DECODE TABLE ***
    
    0 TABLE plx --- create a table for 56 encoded high/low pairs
    	$73747576 , $67707172 , $62636465 , $56576061 ,	$51525354 , $45464750 , $40414243 ,
    	$34353637 , $27303132 , $23242526 , $16172021 , $12131415 , $05060710 , $01020304 ,
    
    		*** PHYSICAL LED DRIVER ***
    
    --- user can change led display pins on the fly
    pub PLEXPIN ( pin -- )	>!
    pri leds			8 ;
    
    --- light an LED (only one at a time)
    pri XYLED	( x y -- )	3 << + plx + C@ DUP 7 AND leds + LOW 4 >> leds + HIGH ;
    
    		*** LED PIXEL BUFFER ***
    private
    14 	bytes 	ledbuf	--- holds displayed character + new character to be scrolled in
    	byte	scol	--- columns to scroll
    
    --- scroll the matrix by one column left
    pri SCROLL		ledbuf 7 ADO I C@ I 7 + C@ 8<< + 2/ DUP I C! 8>> I 7 + C! LOOP ;
    
    		*** LED REFRESH & SCROLLING TASK ***
    
    --- run this task in a cog -
    --- NOTE: a background timer could call the central part of this every 1ms and still not notice any flicker
    pri PLEX.TASK
    	BEGIN
    	3 FOR --- scroll counter
    	  7 0 DO ledbuf I+ C@
    	    8 0 DO DUP I |< AND IF I J XYLED THEN 200 us 0 DIRA COG! LOOP
    	  DROP LOOP
    	 NEXT
    	scol C@ IF scol C-- SCROLL THEN
    	AGAIN
    	;
    
    	*** PLEXLED CHARACTER OUTPUT DEVICE ***
    
    --- Make the PLEXLED the console output device
    pub PLEXLED
    	EMIT:
    pub PLEXCH ( ch -- )
    	1 TASK W@ 0= IF ' PLEX.TASK 1 RUN ledbuf 15 ERASE THEN
    ---	lookup font and transfer to ledbuf when scrolling is done
    	7 * FONT5X7 + ledbuf 7 + 7
    	  BEGIN scol C@ 0= UNTIL CMOVE
    	7 scol C!
    	;
    
     	*** COMBO SERIAL + PLEXLED OUTPUT ***
    
    --- combine the PLEXLED with the serial console
    pub CONLED		EMIT: DUP CONEMIT PLEXCH ;
    
    
    	*** DEBUG words ***
    {
    : PP ( char -- )	PLEXCH ;
    : HELLO			PLEXLED BEGIN ." HELLO WORLD!  "  KEY UNTIL CON ;
    : DEMO			PLEXLED BEGIN ."   PARALLAX P2" 2 s KEY UNTIL CON ;
    }
    END
    

    `

    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
  • @Peter Jakacki
    Thanks. I can now display stuff on the LED Matrix. I'm assuming the _BOOT_P2.BIX has the 5X7 VGA font. (I can see the font5X7 word.)

    However, when I try to send a character to the matrix, I have found that the character displayed is off by 28. For instance, to display "A" (41 hex), I need to send 25 hex.

    What did I miss?
  • DaveJenson wrote: »
    @Peter Jakacki
    Thanks. I can now display stuff on the LED Matrix. I'm assuming the _BOOT_P2.BIX has the 5X7 VGA font. (I can see the font5X7 word.)

    However, when I try to send a character to the matrix, I have found that the character displayed is off by 28. For instance, to display "A" (41 hex), I need to send 25 hex.

    What did I miss?

    Nothing, I think I changed the font table in between and so all you have to do is subtract $1C anytime before you lookup the font table as I do here:
    pub PLEXLED
    	EMIT:
    pub PLEXCH ( ch -- )
    	1 TASK W@ 0= IF ' PLEX.TASK 1 RUN ledbuf 15 ERASE THEN
    ---	lookup font and transfer to ledbuf when scrolling is done
    	$1C - 7 * FONT5X7 + ledbuf 7 + 7
    	  BEGIN scol C@ 0= UNTIL CMOVE
    	7 scol C!
    	;
    



    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
  • Peter, not to carry this OT, but does the ROM have an internal font?
    Feel the need for speed between your PC's com port and Prop?
    Try the FTDI 245 and the FullDuplexParallel Object.

    Check out my spin driver for the Parallax "96 x 64 Color OLED Display Module" Product ID: 28087
  • ke4pjw wrote: »
    Peter, not to carry this OT, but does the ROM have an internal font?

    The P1 had twice as much ROM and it had a font table but with only 16K of ROM for the P2 there is no room left over especially after TAQOZ. Now if only we had 32k of ROM or more..... 😁🤔

    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
  • Aldi had some 128GB Sandisk microSD cards available for $40 so I picked one up today just to try formatting to FAT32 on P2. These reveal a manufactured date of November 2018. I formatted it with 64KB clusters for this test. Works well!
    TAQOZ# 64 KB CLSZ FORMAT ---  CARD: SANDISK   SD SC128 REV$80 #3188775123 DATE:2018/11
     CARD: SANDISK   SD SC128 REV$80 #3188775123 DATE:2018/11
    
    
                       *** OCR *** 
        VALUE........................... $C0FF_8000
        RANGE........................... 2.7V to 3.6V
    
                       *** CSD *** 
        CARD TYPE....................... SDHC
        LATENCY......................... 1ms+1400 clocks 
        SPEED........................... 50Mbps 
        CLASSES......................... 010110110101
        BLKLEN.......................... 512
        SIZE............................ 124,868MB
        Iread Vmin...................... 100ma
        Iread Vmax...................... 1ma
        Iwrite Vmin..................... 35ma
        Iwrite Vmax..................... 10ma
    
                     *** SPEEDS *** 
        SECTOR.......................... 743us,408us,407us,407us,408us,407us,408us,483us,
        BLOCKS.......................... 1,887kB/s @180MHz
    
                       *** MBR *** 
        PARTITION....................... 0 00 INACTIVE
        FILE SYSTEM..................... FAT32 LBA
        CHS START....................... 1023,254,63
        CHS END......................... 0,0,0
        FIRST SECTOR.................... $0000_8000
        TOTAL SECTORS................... 249,704,448 = 127,848MB
    
    00170: 0000_0000 0000_0001 0001_0000 506F_7250     '............ProP'
    
                      *** FAT32 *** 
        OEM............................. TAQOZ P2
        Byte/Sect....................... 512
        Sect/Clust...................... 128 = 64kB
        FATs............................ 2
        Media........................... F8
        Sect/Track...................... $003F
        Heads........................... $00FF
        Hidden Sectors.................. 32,768 = 16MB
        Sect/Part....................... 249,704,448 = 127,848MB
        Sect/FAT........................ 15,240 = 7MB
        Flags........................... 0
        Ver............................. 00 00 
        ROOT Cluster.................... $0000_0002 SECTOR: $0000_F730
        INFO Sector..................... $0001 = $0000_8001
        Backup Sector................... $0006 = $0000_8006
        res............................. 00 00 00 00 00 00 00 00 00 00 00 00 
        Drive#.......................... 128
        Ext sig......................... $29 OK!
        Part Serial#.................... $50AD_0021 #1353515041
        Volume Name..................... P2 CARD    FAT32    ok
    TAQOZ#
    
    TAQOZ# MOUNT ---  CARD: SANDISK   SD SC128 REV$80 #3188775123 DATE:2018/11
     ok
    TAQOZ# DIR --- 
      0: ROOTDIR      08 
      1: ASCIIART.TXT 20 $0000_F7B0   2017-11-24 15:05         55,148 /        65,536   From dondd@hpmwtd.HP
      2: BIRD    .BMP 20 $0000_F830   2018-12-24 06:54        308,346 /       327,680   BMz.......z...l.....
      3: _BOOT_P2.B1  20 $0000_FAB0   2019-02-24 14:18         65,536 /        65,536   ....................
      4: _BOOT_P2.B2  20 $0000_FB30   2019-02-24 14:16         65,536 /        65,536   X...P2D2F   ........
      5: _BOOT_P2.BIN 20 $0000_FBB0   2018-12-24 06:48        131,072 /       131,072   X...P2D2F   ........
      6: _BOOT_P2.LZM 20 $0000_FCB0   2019-02-24 14:09         14,798 /        65,536   ].............,...T.
      7: BUZZ    .BMP 20 $0000_FD30   2018-11-24 01:53        308,346 /       327,680   BMz.......z...l.....
      8: DRAGON  .BMP 20 $0000_FFB0   2018-10-24 01:21        308,346 /       327,680   BMz.......z...l.....
      9: EYEGOD  .BMP 20 $0001_0230   2018-10-24 04:17        308,346 /       327,680   BMz.......z...l.....
     10: FACE    .BMP 20 $0001_04B0   2018-10-24 04:03        308,346 /       327,680   BMz.......z...l.....
     11: FIRE    .BMP 20 $0001_0730   2018-11-24 23:51        308,346 /       327,680   BMz.......z...l.....
     12: FISH2   .VT  20 $0001_09B0   2017-11-24 15:08        211,945 /       262,144   .[H.[J..[1;0H       
     13: ILIAD   .TXT 20 $0001_0BB0   2017-11-24 12:55      1,201,891 /     1,245,184   ...The Project Guten
     14: KJV     .TXT 20 $0001_1530   2017-08-24 12:28      5,504,282 /     5,505,024        _______________
     15: LEXICON .TXT 20 $0001_3F30   2017-11-24 13:48        988,130 /     1,048,576   ...The Project Guten
     16: LMMS    .BMP 20 $0001_4730   2018-10-24 01:01        308,280 /       327,680   BM8.......6...(.....
     17: LOVE    .WAV 20 $0001_49B0   2015-02-24 08:06     14,630,692 /    14,680,064   RIFF.?..WAVEfmt ....
     18: MCQUEEN .BMP 20 $0001_B9B0   2018-10-24 04:19        308,346 /       327,680   BMz.......z...l.....
     19: MIDENG  .TXT 20 $0001_BC30   2017-11-24 14:11      1,248,077 /     1,310,720   ...The Project Guten
     20: P2D2A   .BMP 20 $0001_C630   2018-12-24 14:26        308,346 /       327,680   BMz.......z...l.....
     21: POPCORN .WAV 20 $0001_C8B0   2012-11-24 13:26      3,242,394 /     3,276,800   RIFF.y1.WAVEfmt ....
     22: PRIDE   .TXT 20 $0001_E1B0   2017-11-24 12:54        726,223 /       786,432   ...The Project Guten
     23: ROUGES  .TXT 20 $0001_E7B0   2017-11-24 13:51        219,885 /       262,144   ...The Project Guten
     24: SPIDEY  .BMP 20 $0001_E9B0   2018-10-24 04:24        308,346 /       327,680   BMz.......z...l.....
     25: SPIDEY  .LZM 20 $0001_EC30   2019-02-24 14:23        102,984 /       131,072   ].............!.K..R
     26: SUNSET  .BMP 20 $0001_ED30   2018-10-24 04:13        308,346 /       327,680   BMz.......z...l.....
     27: TIGER   .BMP 20 $0001_EFB0   2018-12-24 14:23        308,346 /       327,680   BMz.......z...l.....
     28: VULGAR  .TXT 20 $0001_F230   2017-11-24 13:56        511,916 /       524,288   ...Project Gutenberg
     29: WARPEACE.LZM 20 $0001_F630   2019-02-24 14:22        921,939 /       983,040   ].............*.....
     30: WARPEACE.TXT 20 $0001_FDB0   2015-08-24 07:27      3,226,652 /     3,276,800   The Project Gutenber
     31: WARWORLD.TXT 20 $0002_16B0   2017-11-24 13:42        365,413 /       393,216   ...The Project Guten
     32: WEBSTERS.TXT 20 $0002_19B0   2017-11-24 12:59     28,956,348 /    28,966,912   ...The Project Guten
     33: PS2KEYB .FTH 20 $0002_F6B0   2019-03-24 14:13          5,015 /        65,536   TAQOZ ( 636 bytes ).
     34: VGA     .FTH 20 $0002_F730   2019-03-24 14:13         15,058 /        65,536   TAQOZ ( 2,576 bytes 
     35: VOCAB   .FTH 20 $0002_F7B0   2019-03-24 22:45          1,418 /        65,536   TAQOZ.....--- find e
     36: TAQOZ2V0.FTH 20 $0002_F830   2019-03-24 11:48         50,539 /        65,536   \ : PBJ..TAQOZ ( 6,3
     37: EXFAT   .TXT 20 $0002_F8B0   2019-03-24 13:13          4,907 /        65,536   TAQOZ# .DISK ---  CA
     38: PUMP    .TXT 20 $0002_F930   2019-03-24 11:30          3,421 /        65,536   : PUMP CRLF 0 BEGIN 
     39: DECOMP  .FTH 20 $0002_F9B0   2019-03-24 14:00          6,223 /        65,536   TAQOZ....(       DEC
     40: FBSPI3  .FTH 20 $0002_FA30   2019-03-24 08:19          1,354 /        65,536   8 := CLK.9 := MOSI.1
     41: DOTLED  .FTH 20 $0002_FAB0   2019-03-24 04:23            311 /        65,536   24 := segments.32 :=
     42: LIFE    .FTH 20 $0002_FB30   2019-02-24 00:30          5,221 /        65,536   TAQOZ......pub LIFE.
     43: EXTRAS  .FTH 20 $0002_FBB0   2019-02-24 00:31          1,535 /        65,536   TAQOZ ( 320 bytes  )  ok
    TAQOZ#
    

    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
  • Nice Peter. Certainly a good price!
    I presume you can read and write files ok on the pc with Linux?
    Do you have a Windoze pc to try that also? Windoze may not like 64KB clusters?
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
    Prop OS (also see Sphinx, PropDos, PropCmd, Spinix)
    Website: www.clusos.com
    Prop Tools (Index) , Emulators (Index) , ZiCog (Z80)
  • PublisonPublison Posts: 10,728
    edited 2019-03-24 - 19:09:24
    Aldi had some 128GB Sandisk microSD cards available for $40 so I picked one up today just to try formatting to FAT32 on P2. These reveal a manufactured date of November 2018. I formatted it with 64KB clusters for this test. Works well!

    Peter,

    Was that a Sandisk 128 Ultra, Ultra Plus, Extreme or Extreme Pro?
    Infernal Machine
  • It is a SanDisk Ultra microSDXC UHS-1 Class 10. I can read 64kB clusters in Linux no problem and also on Win10 systems although I know the earlier Windows could only handle 32kB clusters.

    I even picked up a Canon SX620HS compact x25 zoom camera for $129. The 128GB card will probably end up in my phone although I seem to have plenty of storage there already.

    Tachyon Forth - compact, fast, forthwright and interactive
    useforthlogo-s.png
    --->CLICK THE LOGO for more links<---
    P2CHIP-1.jpg
    P2 +++++ TAQOZ INTRO & LINKS +++++ P2 SHORTFORM DATASHEET
    P1 +++++ Latest binary V5.4 includes EASYFILE +++++ Tachyon Forth News Blog
    Brisbane, Australia
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