P2-ES maximum current

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Comments

  • Perhaps spurred by competition with GaN devices?

    Actually looking at the datasheet and dual heatpads, it suggests its a dual-die package, allowing
    VFETs to be used (You can't have more than one VFET on a die unless they share the drain/substrate
    connection).

    Compare with the VNH5019 and similar H-bridge devices (triple die I think).
  • cgracey wrote:
    1) The P2 market is inventors who are hamstrung with systems that don't afford them accurate real-time control. The only current solution is to employ FPGA's, but they are quite difficult to work with. P2 makes it easy to get cycle-accurate performance with good analog, all in one integrated system with tons of hardware and software concurrency.

    2) Get the chip done, demonstrate its power and ease of use through short videos, make lots of interesting things with it, get the idea across to people that the P2 is worthy of their time investment, as it will return functional dividends that they can't get anywhere else. Foster a good community of people who produce and share lots of applications and know-how.
    Those are actually pretty good answers, although I do wonder about the market volume that #1 represents and whether a small company like Parallax will find acceptance in that market. I guess we'll find out!

    Thanks, Chip!
    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • That's no different to what would have been said about the Prop1 during its design - if the public knew about it.

    Personally, with what I know, I think the Prop2 has an even brighter future than the Prop1. It is a Propeller still, the symmetries of the Prop1 are there. The extra speed and features are real, the extra hubRAM alone will open new doors. It is simple to program on the whole (There is some complexities to overcome with the parallel nature of many capabilities).

    And, with it's fully uptodate design process, allows for future editions. Remember, this is the very reason why an extended Prop1 never came to be. Maybe an extra low power Prop2 could be a future model.
    "... peers into the actual workings of a quantum jump for the first time. The results
    reveal a surprising finding that contradicts Danish physicist Niels Bohr's established view
    —the jumps are neither abrupt nor as random as previously thought."
  • jmg wrote: »
    evanh wrote: »
    I feel that upping CT to 64 bits was overkill.
    Perhaps, but the power impact is minimal, because only 32 more flops are clocked, and any extra CT bus lines toggle very slowly indeed.
    Two things here. One is, they are still clocked even if non-toggling ones are less hungry. Second is, going by what has been said over the years about achieving optimal sysclock rates, particularly with I/O, there is a good chance that such large distribution has its own tree of stages. 8 cogs, 8 streamers, 64 smartpins, and PRNG is also spread around the whole pad-ring. It's true that no single bit has significant impact but in total they do add up.

    I was mainly pointing out that ungated IN clocking is just part of a larger group of signals that are always live on every sysclock.

    In terms of 33 vs 64 bits for CT, they are same from software complexity and overheads. So, I'm happy that Chip did go full hog there. But there was certain no actual need of more than 32 bits in hardware. Subroutines/libraries can do longer intervals.
    "... peers into the actual workings of a quantum jump for the first time. The results
    reveal a surprising finding that contradicts Danish physicist Niels Bohr's established view
    —the jumps are neither abrupt nor as random as previously thought."
  • cgraceycgracey Posts: 11,508
    edited 2019-03-06 - 00:55:36
    cgracey wrote:
    1) The P2 market is inventors who are hamstrung with systems that don't afford them accurate real-time control. The only current solution is to employ FPGA's, but they are quite difficult to work with. P2 makes it easy to get cycle-accurate performance with good analog, all in one integrated system with tons of hardware and software concurrency.

    2) Get the chip done, demonstrate its power and ease of use through short videos, make lots of interesting things with it, get the idea across to people that the P2 is worthy of their time investment, as it will return functional dividends that they can't get anywhere else. Foster a good community of people who produce and share lots of applications and know-how.
    Those are actually pretty good answers, although I do wonder about the market volume that #1 represents and whether a small company like Parallax will find acceptance in that market. I guess we'll find out!

    Thanks, Chip!
    -Phil

    I think the real growth potential is in making people aware of what new things they can achieve that they are not even considering today, since their thinking has been bounded by Arduinos and ARMs. Those systems have imposed some limitations on the gamut of thoughts they are likely to entertain. I suppose a lot of people need the P2 badly, but don't even know what to ask for, maybe assuming it's not even possible, because they lack reference for anything outside of the current paradigm. They are stuck in Arduinoland and have maybe heard about FPGAs, but really need something to bridge the chasm and make it all accessible and simple. They need to be shown a new horizon and start thinking new thoughts. I really want for the P2 to address that. It needs to be sheer fun, too.

    We need to maximize effort-over-result without resorting to any gimmicks. The P2 needs to be like a good, committed spouse, and not a flaky girlfriend, or a half-there careerist, or an inaccessible supermodel. It needs to be something that people can grow with, indefinitely, and learn good first-principle lessons with that are timeless. Any women reading this can modify that description so it is apt for them.
  • cgracey wrote: »

    I think the real growth potential is in making people aware of what new things they can achieve that they are not even considering today, since their thinking has been bounded by Arduinos and ARMs. Those systems have imposed some limitations on the gamut of thoughts they are likely to entertain. I suppose a lot of people need the P2 badly, but don't even know what to ask for, maybe assuming it's not even possible, because they lack reference for anything outside of the current paradigm. They are stuck in Arduinoland and have maybe heard about FPGAs, but really need something to bridge the chasm and make it all accessible and simple. They need to be shown a new horizon and start thinking new thoughts. I really want for the P2 to address that. It needs to be sheer fun, too.

    I agree about people stuck in Arduinoland, and it's probably now becoming a mindset. I do still wonder given their volume if some of them can be siphoned off by showing that the P2 can do all an Arduino can do plus so much more by providing a fully featured port of Arduino to P2 (assuming a C++ compiler is available) sort of like the ESP8266 did for example, and if once that environment was made available whether they would just stick to the tools they know and not delve any further into whatever else a P2 offers beyond the Arduino APIs. I guess regardless of the outcome it could still help potentially sell more P2 chips though if the P2 was a supported Arduino target. The idea probably needs some crossover from some type of OBEX2 to Arduino code objects to allow lower level peripheral libraries to be easily shared.
  • RaymanRayman Posts: 9,562
    edited 2019-03-06 - 01:19:03
    I also think a bridge from Arduino to P2 would be a good idea.

    I’d also like a C++ compiler for myself...
    Prop Info and Apps: http://www.rayslogic.com/
  • evanhevanh Posts: 7,520
    edited 2019-04-02 - 15:08:11
    I think I've been operating the 1v8 rail near 2 Amps. Excluding converter inefficiencies I calculate 2.3 Amps wrt to 880 mA on the 5 Volt rail (5.2 Volts). This was at 360 MHz and everything running.

    EDIT: It did take some cool running to achieve though. Once the heatsink temperature rises above 20 oC it is all over.

    This was for testing the new thermocouple probe. It works much better than what I had. Far more responsive and shows significant positive temperature difference at load. Something like +15 oC wrt the old probe while rising.

    "... peers into the actual workings of a quantum jump for the first time. The results
    reveal a surprising finding that contradicts Danish physicist Niels Bohr's established view
    —the jumps are neither abrupt nor as random as previously thought."
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