Accessory Set: Control Board

The switches do not have pulldowns: when not pressed, the pin just sees an open circuit. The only way I could get them to work right is:
dir[]~~      drive the pin
out[]~    low
dir[]~    release
waitcnt()    I/O  pipelining?
in[]       read it

tc

Comments

  • I am not sure how to do it, but you can enable internal pullups/pulldowns on P2.
  • I noticed this too. Aren't pullups/pulldowns among the smartpin functions? I think there are also series resistors which is why you don't need the external resistor array for VGA any more.
  • I think the external resistors for VGA where more to form a simple DAC. Now, we have a real DAC inside.

    That, said, I did see something about picking a drive current, which I guess is similar to a series resistor...
  • RaymanRayman Posts: 10,068
    edited 2019-02-13 - 23:13:29
    I think it's time for me to revisit my P2 website... Probably 10 years since last update...

    Definitely need to put this there (actually a deciphered version of this would be better, I have to relearn every time I look at this...):
    1252 x 802 - 217K
  • IIRC the internal P2 smartpin resistor modes are for output drive only.



  • evanhevanh Posts: 8,619
    edited 2019-02-13 - 23:51:48
    This will give a 15k pull-up and pull-down resistance and schmitt trigger on the real silicon. Use DRVH #pin to pull-up or DRVL #pin to pull-down.
    		wrpin	##( %0_011_000010010 << 8 ), #pin
    

    EDIT: Damn smilies in code block!
  • It still performs as an input with the output driven.
  • evanh wrote: »
    It still performs as an input with the output driven.

    So it does. :)

    	basepin = 8
    	button = basepin+7
    	led = basepin+3
    
    dat	org
    
    	wrpin	##%010_00_00000_0,#button '15k pulldown
    	dirh	#button
    
    loop	testp	#button wc
    	drvc	#led
    	jmp	#loop
    
    

  • evanhevanh Posts: 8,619
    edited 2019-02-14 - 01:01:15
    Ah, I've just worked out how to make an input counting smartpin output its completion IN to a pin! There was some reason I wanted this months back.

    It's right there in those VVV bits ...
    	%0_VVV_CIOHHHLLL = Digital mode (default = %0000000000000)
    		DIR enables PinA digital output
    		%VVV = Digital config
    			000: IN = PinA logic, PinA output from OUT
    			001: IN = PinA logic, PinA output from IN
    			010: IN = PinB logic, PinA output from IN
    			011: IN = PinA schmitt, PinA output from OUT
    			100: IN = PinA schmitt, PinA output from IN
    			101: IN = PinB schmitt, PinA output from IN
    			110: IN = PinA > PinB comparator, PinA output from OUT
    			111: IN = PinA > PinB comparator, PinA output from IN
    

    Hmm, I'm going to have to improve my deciphering. I've kind of given IN two separate purposes in the same lines.


    The input signal path always goes from the pin into the %AAAA_BBBB_FFF selectors before reaching either the smartpins or cog's IN. So, my left-hand use of IN is too early in the signal path.

    I believe the right-hand use of IN is correct. It is what the cogs see.


    EDIT: No, I must be wrong. IN is consistent within that text. It isn't the cog's IN though, it's just the pin input within the custom pad ring. The purpose of having it reflect itself is to be able to do something like a sigma-delta ADC with external capacitor and still only need a single pin.
  • We need to put together some nice block diagrams of these pin configuration modes.
  • evanhevanh Posts: 8,619
    edited 2019-02-14 - 00:51:23
    Only decent package I have for that is schematic entry for PCB work, ie: KiCAD or DipTrace. Not really good at block diagrams.

  • Chip also hasn't been entirely consistent either.
    		%C = clocked I/O (extra clock for IN and OUT)
    		%I = invert IN output
    		%O = invert OUT input
    
    These are custom pad ring controls. IN and OUT are both interceptable between there and the cogs.
  • evanhevanh Posts: 8,619
    edited 2019-02-14 - 03:27:29
    Here's a start in ASCII. It doesn't have any of the DAC handling though.
                         Logic buffered "OTHER"    [=============]          [============]
                  -------------------------------->[ Logic Output]          [            ]
                 |                -----------------[  Config     ]<---------[---o----o---]<------- DIR
                 |               |                 [  (%TT)      ]          [  (M == 0)  ]
                 |               v                 [             ]          [            ]
                 |       [=============]           [             ]          [            ]
    [========]   |       [  Pad Output ]           [             ]          [  (M == 0)  ]
    [Physical]<----------[  Config     ]<------+---[             ]<---------[---o----o---]<------- OUT
    [  PinA  ]   |       [  (%P...P)   ]       |   [=============]          [            ]
    [        ]--------   [=============]     ??|                            [            ]
    [========]   |   |           ^             |                            [  Smartpin  ]
                 |   |           |             |     -1  -2  -3             [   Config   ]
                 |   |           |             |      |   |   |             [ (%MMMMM_0) ]
                 |   |           |             |      v   v   v             [            ]
                 |   |           |             |   [=============]      A   [            ]
    [========]   |   |   [=============]        -->[ Logic Input ]--------->[---o----o---]--------> IN
    [Physical]---     -->[  Pad Input  ]           [  Config     ]      B   [  (M == 0)  ]
    [  PinB  ]           [  Config     ]---------->[  (A_B_F)    ]--------->[            ]
    [        ]---------->[  (%P...P)   ]           [=============]          [            ]
    [========]           [=============]              ^   ^   ^             [============]
                                                      |   |   |
                                                      |   |   |
                                                     +1  +2  +3
    
    
    EDIT: Added the ?? (OUT) input to Logic Inputs. I'm completely unsure of this source.
  • evanhevanh Posts: 8,619
    edited 2019-02-14 - 11:51:33
    I'm happy enough with how I've placed the logic input "OUT" source, %AAAA(BBBB)==%x100. It's not perfect, the circuit actually comes from after the DIR enable but before the output drive. If the output drive is configured for, say, a pull-up, with OUT and DIR both high, but the pin is held low against the pull-up then pin input reads low while the "OUT" source reads high.

    PS: This actually worked with the FPGA. I used %CIOHHHLLL = %000111111 to set floating output drive. With both DIR and OUT high, the pin happily sank low on its own.
  • @evanh
    Express SCH is a free and reasonable schematic package.
  • Schematic entry isn't very suitable for block diagrams.

    I've started looking at LibreOffice Draw. It seems better suited. So I'm trying to expand the overall diagram at the same time. The pins are somewhat paired at the low level.
  • Tried ozpropdev's example in inline asm with fastspin, and it works nicely. Another arrow in the quiver...
  • localrogerlocalroger Posts: 3,315
    edited 2019-02-14 - 21:07:17
    Once the pin is set up, you can use it with ina/inb:
    CON 
        basepin = 32  '<32 use ina/outa, =>32 use inb/outb
        button = basepin+7
        led = basepin+3
        isbutton = %010_00_00000_0  '15k pulldown
    
    pub main
    
        asm
            wrpin   ##isbutton,#button
        endasm
    
        dirb[button]~~ 'button still acts as input
        dirb[led]~~
        repeat
            outb[led] := inb[button]
    
    Edit: Even SPINnier...
    CON 
        basepin = 32
        isbutton = %010_00_00000_0 '15k pulldown
    
    pub main | i
    
        repeat i from basepin+4 to basepin+7
            asm
                wrpin   ##isbutton,i
            endasm
    
        dirb[basepin..basepin+7]~~ 'buttons still act as input
        repeat
            outb[basepin..basepin+3] := inb[basepin+4..basepin+7]
    
    (And what, the LED's aren't in the same order as the buttons?)

    edit 2: I got my control board in my charlieplexing LED matrix (attached)
  • msrobotsmsrobots Posts: 3,034
    edited 2019-02-14 - 15:45:50
    This LED/Button Board has LEDs numbered in one direction Buttons numbered in the other one.

    But that gives at least for 2 buttons and LEDs the ability that the LED and its corresponding Button are in the reach of +-3 from each other.

    Would that mean that when I set the output of the smart pin to the input of another smartpin one would not need that repeat loop above, but the LED would lit when the button is pressed, because the pins talk directly via smartpin?

    curious,

    Mike
  • tomcrawfordtomcrawford Posts: 1,075
    edited 2019-02-14 - 15:14:49
    Thank you, @ozpropdev and Thank you, @localroger.

    I look forward to the day when Prop2 is documented as well as Prop1 (and I know that day will come).

    Edit: and Thank you, @evanh
  • It's weirder than that, msrobots. With the board mounted vertically, the bit patterns are:
    Buttons: 1 4  LEDs: 1 8
             2 8        2 4
    
    Added a spin2 to echo bit pattern to the charlieplexed LED matrix in my last comment.
  • localroger wrote: »
    ...edit 2: I got my control board in my charlieplexing LED matrix (attached)...
    One small problem with es-control-test3.spin2...
    Works as long as the Control Acc is located with 32 or greater basepin...
        repeat
            if ctrl_base < 32
                v := inb[ctrl_base+4..ctrl_base+7]   '<== inb?
                outb[ctrl_base..ctrl_base+3] := v    '<== outb?
            else
                v := inb[ctrl_base+4..ctrl_base+7]
                outb[ctrl_base..ctrl_base+3] := v
    
    Change to:
        repeat
            if ctrl_base < 32
                v := ina[ctrl_base+4..ctrl_base+7]  '<== fixed :-)
                outa[ctrl_base..ctrl_base+3] := v   '<== fixed :-)
            else
                v := inb[ctrl_base+4..ctrl_base+7]
                outb[ctrl_base..ctrl_base+3] := v
    

    dgately
  • localroger wrote: »
    It's weirder than that, msrobots. With the board mounted vertically, the bit patterns are:
    Buttons: 1 4  LEDs: 1 8
             2 8        2 4
    
    Added a spin2 to echo bit pattern to the charlieplexed LED matrix in my last comment.

    Nah @localroger there are some typos, you use the button numbers for LEDs

    best would have bee buttons and LED on odd/even pairs

    Enjoy!

    Mike

  • Thanks for spotting that dgately, it should now be fixed in the download.
  • evanh wrote: »
    Schematic entry isn't very suitable for block diagrams.

    I've started looking at LibreOffice Draw. It seems better suited. So I'm trying to expand the overall diagram at the same time. The pins are somewhat paired at the low level.

    Express Schematic is actually quite good for block diagrams. I often use it for that purpose.
    Attached are some examples
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