Reading the discussions around Boot ROM, and what can, and cannot, fit into that, and ideas around included higher level support, & languages & Parallax software resources.... & it got me thinking...
Right now, there are pre-wired jumpers to select boot decision choices, for faster boot, but those need added parts, explanation, and are not easily changed.
These also limit the choices, as there are a finite number of pins.
Then the idea occurred to pull those jumpers into a compact/cheap memory.
This eliminates manual jumper provision and selection, and can make a PCB smaller and easier to document.
This also expands the choices, as there is no longer pin-limits.
Along with Rapid Boot-source choice, you can now include a Library index.
Parallax could ship a P2-resource-image, with ALL of Spin-P2, Forth-P2, Prop2-Basic, Python-P2....
The 'electronic jumper' can easily say 'Boot from SPI', and select a library item number. Gives the appearance of Spin in ROM..
Some users have asked for OTP serial numbers, & if P2 is not going to have OTP, that's a usage issue.....
Looking for suitable memory, I can find
* Small MCUs, eg STC8F04 (SO8) (still quite new, but appears to be very low cost and secure, with i2c ability) or also new STM8S001J3M3 (SO8)
* Serial Presence Detect memory (SPD), (eg 34C02) looks close to ideal. Can come as small as 2x3mm, and Digikey lists from 3.1c
34C02, has 128 bytes of OTP are, that can be written and OTP-locked, for those wanting product serial numbers, and customer config information.
Many MCUs have fuse options for default port settings - a Fast-read SPD memory, could init the port-pins in Boot, before the whole program is loaded.
That should slash the time from RESET-to-known-pin values, and makes that time not depend on code size. eg 16 Bytes can fast-define OUT and DIR.
This can also give a Physical P2 identity, removing/augmenting the need for Physical Pin Masks in the loader-preamble.
(someone who wants to use 16,32,64 P2's is not going to be keen on losing 4,5,6 pins on each part, just for the ID )
The 34C02 is made in large volumes, multisourced, (includes OnSemi) and is i2c read, and has 128 bytes of EEPROM, that becomes the jumper area, and 128 bytes of Permanent Software Write Protection
The suggestion is that Boot ROM adds code to check for connected SPD (eg) 34C02, and if found, & not blank, it uses that info for the next boot decisions, rapid Pin Init, and other housekeeping tasks...(PLL clk set?) etc
People are used to having such Config memory on every DIMM module, so Parallax could plan to include this on every P2 module.
Serial Flash parts are low cost, 20c gets you 2MBytes, a small portion of which can be Parallax Software libraries.
All of this reduces the impact of not having OTP in the P2 itself.