Fozzie on a pin

ozpropdevozpropdev Posts: 2,199
edited October 6 in Propeller 2 Vote Up1Vote Down
Hi All

I finally woke fozzie up again and he's spinning nicely on the P2 silicon.
This code really works the hub and cordic and uses all 8 cogs.
With no additional components we have NTSC output on a IO pin. Very Cool! :cool:

Two versions Big and little fozzie.
Melbourne, Australia
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Comments

  • 46 Comments sorted by Date Added Votes
  • Great Job. Things are looking up!
    Infernal Machine
  • Thanks for getting that going again, Brian. Looks good!
  • Thats just brilliant, Brian. Well done.
  • Cluso99Cluso99 Posts: 13,900
    edited October 6 Vote Up0Vote Down
    Cannot view the MP4 on my iPhone :(
    Will have to wait till I am on my pc

    Couldn't resist. I just had to go take a look on my pc. Nice job Brian. Had a quick once over on the code but forgot to check the resolution :(
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
    Prop OS (also see Sphinx, PropDos, PropCmd, Spinix)
    Website: www.clusos.com
    Prop Tools (Index) , Emulators (Index) , ZiCog (Z80)
  • Cluso99 wrote: »
    Cannot view the MP4 on my iPhone :(
    Will have to wait till I am on my pc

    Couldn't resist. I just had to go take a look on my pc. Nice job Brian. Had a quick once over on the code but forgot to check the resolution :(

    Same on My iPad, had to revert to my win laptop.
    Jim
  • Is the modulation error irrelevant for monochrome images, with no need to modify the code?
    Formerly known as TonyB
  • cgraceycgracey Posts: 9,528
    edited October 7 Vote Up0Vote Down
    TonyB_ wrote: »
    Is the modulation error irrelevant for monochrome images, with no need to modify the code?

    That should be the case.

    It's a shame that the modulator got messed up. It was like icing on the cake.
  • Cluso99Cluso99 Posts: 13,900
    edited October 7 Vote Up0Vote Down
    Unfortunately errors such as these do sneak thru. But we have running chips and very usable. It's a real credit to Chip that so much works so well!

    At least we can do lots of testing and give the chip a good workout.

    Chip,
    are the ~1500 chips being packaged and if so when do you expect them?
    With these, there's no immediate hurry for a silicon respin.
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
    Prop OS (also see Sphinx, PropDos, PropCmd, Spinix)
    Website: www.clusos.com
    Prop Tools (Index) , Emulators (Index) , ZiCog (Z80)
  • For now, achieving color video through component video ( Y Cb Cr ) is probably the way to go. Thats always going to come up looking better than composite anyway
  • Brian, go get Handbrake and use it! https://handbrake.fr/downloads.php
    Here's a more desktop friendly view that's a smaller filesize to boot:
    "Are we alone in the universe?"
    "Yes," said the Oracle.
    "So there's no other life out there?"
    "There is. They're alone too."
  • Thanks Evan!
    I will use that in the future.
    It's good that Chip requested MP4 to be added to the forum recently. :)
    Melbourne, Australia
  • Yep, more fun.

    Part of trick of making the filesize smaller without sacrificing quality was to strip out the audio track. That was taking about 2 MB I think.
    "Are we alone in the universe?"
    "Yes," said the Oracle.
    "So there's no other life out there?"
    "There is. They're alone too."
  • pedwardpedward Posts: 1,485
    edited October 8 Vote Up0Vote Down
    And someone had to do it:

    fozzie16.gif
  • cgraceycgracey Posts: 9,528
    edited October 8 Vote Up0Vote Down
    Cool. Here is Pedward's secret:
    [img]http://apsoft.com/pictures/fozzie16.gif[/img]
    

    I guess I've been given moderator power because I can click "edit" on anyone's post and see the source.
  • BTW
    I ran fozzie at 340MHz and it worked! Cordic and hub spinning nicely.
    5 volt supply showed 550mA current.

    Fozzie was spinning so fast I was worried the pixels might fly of the screen :)
    Melbourne, Australia
  • ozpropdev wrote: »
    BTW
    I ran fozzie at 340MHz and it worked! Cordic and hub spinning nicely.
    5 volt supply showed 550mA current.

    Fozzie was spinning so fast I was worried the pixels might fly of the screen :)

    Wow!

    I'm kind of leaning towards NOT putting clock gating in, because it would only drop peak performance. If anything, maybe we should see if we could push to an official 200MHz rating.
  • I gather that's an onboard 1.8V regulator.
    "Are we alone in the universe?"
    "Yes," said the Oracle.
    "So there's no other life out there?"
    "There is. They're alone too."
  • cgraceycgracey Posts: 9,528
    edited October 8 Vote Up0Vote Down
    I am feeding in VDD and VIO from a bench supply. I have to compensate for a 200mV drop over the wires feeding the board. There is only one bypass cap on the P2D2 VDD and one cap on the VIO. Because there is no clock-gating in the P2, it's kind of like a turbine in power smoothness, as opposed to a piston engine.
  • Brian's numbers - 5v supply. Which presumably means he's doing 340 MHz at 1.8 volts!
    "Are we alone in the universe?"
    "Yes," said the Oracle.
    "So there's no other life out there?"
    "There is. They're alone too."
  • jmgjmg Posts: 12,052
    cgracey wrote: »
    .. There is only one bypass cap on the P2D2 VDD and one cap on the VIO. ...
    Really, just one cap in total, per supply ?
    That sounds maybe too spartan ? - and perhaps that is why ozpropdev is able to report 340MHz ? (on what I presume is a fully populated PCB )
  • jmgjmg Posts: 12,052
    cgracey wrote: »
    I'm kind of leaning towards NOT putting clock gating in, because it would only drop peak performance..
    I'm not sure it has to drop peak performance, if you do it more as enabled clock bus lines - ie just a few enables, on the VCO/Divider out.
    A gate there just delays the SysCLK, but does not add into the Tsu,Th budgets (apart from maybe some small clock skew allowances)

    Do you know exactly where the tools place these automated 'clock gates' and how much do they save ?
  • Yes Brian and I are just using xcl220 switcher reg that Peter loaded onto the board.
    So all we can really measure is the 5v current, but that still tells a fair bit.

  • Tubular wrote: »
    Yes Brian and I are just using xcl220 switcher reg that Peter loaded onto the board.
    So all we can really measure is the 5v current, but that still tells a fair bit.

    So, are you getting 340MHz from 1.8V, then?

    I know my setup is loosey-goosey.
  • jmg wrote: »
    cgracey wrote: »
    I'm kind of leaning towards NOT putting clock gating in, because it would only drop peak performance..
    I'm not sure it has to drop peak performance, if you do it more as enabled clock bus lines - ie just a few enables, on the VCO/Divider out.
    A gate there just delays the SysCLK, but does not add into the Tsu,Th budgets (apart from maybe some small clock skew allowances)

    Do you know exactly where the tools place these automated 'clock gates' and how much do they save ?

    I remember hearing about a setting in the tools where you tell it at what threshold number of flops to implement a common clock gate at. I think 4 flops was kind of a minimum.

    I don't know how high up the clock tree automated decisions are made on clock-gating. We will be asking about it.
  • TubularTubular Posts: 3,117
    edited October 8 Vote Up0Vote Down
    Would you believe (greyscale) NTSC Fozzie still spins all the way down to 8 MHz? Possibly below - the maths calcs through an error if I put in 7 MHz...

    There's a couple of minor artifacts but everything is clearly recognisable

    Current consumption is about 16mA when running (keep in mind this has 8 cogs going, too), including the video load

    This P2 chip has quite a 'range'...
  • Yeah, I'm leaning that way too. Let's leave it, because it really is BEAST EDITION.
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: http://forums.parallax.com/showthread.php?123709-Commented-Graphics_Demo.spin<br>
  • cgraceycgracey Posts: 9,528
    edited October 8 Vote Up0Vote Down
    Tubular wrote: »
    Would you believe (greyscale) NTSC Fozzie still spins all the way down to 8 MHz? Possibly below - the maths calcs through an error if I put in 7 MHz...

    There's a couple of minor artifacts but everything is clearly recognisable

    Current consumption is about 16mA when running (keep in mind this has 8 cogs going, too), including the video load

    This P2 chip has quite a 'range'...

    That's great news. I saw artifacts at 10MHz, but they went away at 12.5MHz. At 8 MHz, your timing granularity is a big 125ns, which is pretty chunky. At 340MHz, it drops to 2.94ns, which is really fine.

    My testing today showed that setup and hold timing on the DAC data is apparently A-okay, from one end of the speed/voltage extreme to the other. I think the chip design tools these days are really thorough.
  • jmgjmg Posts: 12,052
    cgracey wrote: »
    Tubular wrote: »
    Yes Brian and I are just using xcl220 switcher reg that Peter loaded onto the board.
    So all we can really measure is the 5v current, but that still tells a fair bit.

    So, are you getting 340MHz from 1.8V, then?

    I know my setup is loosey-goosey.

    You really should add some more caps... that's a quite abnormal test set-up.
    Add them in stages and record the MHz changes as you go ?
  • Couple on new extreme benchmarks for NTSC silicon fozzie:-

    Lowest clock rate: 7.16129 MHz - 12mA at 5v, 1 minion cog
    Highest clock rate: 348 MHz - 540 mA at 5v, 4 minion cogs

    We tried several different divisors for 348 MHz, a lot of weird stuff happens at the step immediately afterwards (eg 350 MHz has 'half a fozzie') etc.

  • That's crazy it working at 7Mhz!

    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: http://forums.parallax.com/showthread.php?123709-Commented-Graphics_Demo.spin<br>
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