- As a probable bonus, those metal protrusions are part of the "scrapped" material, that need to be sawed-out, before the other leads are formed, to their final shapes.
So, it's unlikely that they'll represent a significant increase in package cost.
Anything rare in IC packaging, most certainly is a significant increase in package cost.
OnSemi needs to choose a high volume package.
I cannot seem to find any part codes that actually use that P-HLFQFP100-14x14-0.50 or PLQP0100KD-A ?
After looking at the layout again, something caught my eye. Then, after reviewing the "unofficial datasheet" again on the P2 Documentation dropbox link, my suspicion was confirmed. This package design really only has a GND connection through the center pad? No leads go to GND? I have never seen that before and my opinion is that it's an unwise choice. Time will tell.
There are many 'leads to gnd' inside the package, ie the die's many GND pads wire bond onto the PAD area.
OnSemi are making this, so they must have signed off on the bonding plan.
Here is an image example, of exposed die paddle bonding, the connections are the 'down bond'
The 'TEST' pin gets 'tied to ground'. Yes, thats the only one other than the exposed pad.
One advantage of the single big ground pad is from an EMC susceptability point of view, this thing isn't going to have the usual ground loops and associated noise injection from outside.
Anything rare in IC packaging, most certainly is a significant increase in package cost.
OnSemi needs to choose a high volume package.
I cannot seem to find any part codes that actually use that P-HLFQFP100-14x14-0.50 or PLQP0100KD-A ?
Unfortunately, when it comes to a 100 (101, in fact) pin, 14mm x 14mm, ~10mm square exposed pad LQFP, there are not many options out there.
I had also noticed that Renesas has dropped those packages to a 'limbo', mainly by the following reasons, IMHO:
- Cost (total cost of application, in fact), because smaller and cheaper options are available and on the raise (e.g., BGAs and their even smaller sons, CSPs);
- Geometry shrinks, 2.5D and 3D drives the mass markets, every IC designer/provider wants their products to become 'mobile', IOT, etc...
- QFPs, in general, grow in area and weight, as pin count grows. Area and weight are seen as being 'bad karma' for those growing markets;
- Only a few companies seems to have any concerns about their customers being able or not, to do hand solder or rework anything, very few indeed. Programmed obsolescence, conscious discarding and recycling of electronic devices are more than a culture; they are the utmost gear driving mass market engines.
Without any specific aiming and almost unconsciously, we did pulled that trigger. Where the bullet will hit, only at the future we will see.
Unfortunately, when it comes to a 100 (101, in fact) pin, 14mm x 14mm, ~10mm square exposed pad LQFP, there are not many options out there.
I had also noticed that Renesas has dropped those packages to a 'limbo', mainly by the following reasons, IMHO:
- Cost (total cost of application, in fact), because smaller and cheaper options are available and on the raise (e.g., BGAs and their even smaller sons, CSPs);
- Geometry shrinks, 2.5D and 3D drives the mass markets, every IC designer/provider wants their products to become 'mobile', IOT, etc...
- QFPs, in general, grow in area and weight, as pin count grows. Area and weight are seen as being 'bad karma' for those growing markets;
- Only a few companies seems to have any concerns about their customers being able or not, to do hand solder or rework anything, very few indeed....
The present P2 package seems a reasonable Thermal/handling point, given the large die size.
Possible future options will be firstly dictated by 'what is available' and 'what can fit', but the EPAD has bumped users pretty much to reflow process
The QFN100 I linked earlier might fit P2 Die, and it does have a nominally smaller** PCB footprint, but the QFN100 found is 0.4mm QFN, and that is a notch harder than 0.5mm TQFP
BGA seems to offer little size gain, given the large die dimensions ?
** QFN parts can look smaller, but if you cannot fit vias inside the pad ring, the finally fan-out area can be not much smaller than TQFP100.
There are many 'leads to gnd' inside the package, ie the die's many GND pads wire bond onto the PAD area.
OnSemi are making this, so they must have signed off on the bonding plan.
Those are not leads, they are wire bonds and from an EMI perspective should not be treated the same. OnSemi may have signed off on the bonding plan, but I doubt they are reviewing the design apart from a DFM perspective. From a theory of operation perspective, this layout includes risks. In my 27 years of electronics manufacturing positions, I have never seen a chip not have ground brought out to perimeter pins or multiple balls for numerous reasons, EMI being one. As I said, time will tell and I of course will still be waiting for the BGA package version. The thought that the P2 needs to be easy to handsolder has been given significantly too much weight in my opinion. Then again, I am still wondering why Parallax didn't partner with TSI as a foundry since they are literally 10 minutes away. I am sure there are reasons that I am unaware of for many of my questions, but when compared to all the other chips I deal with on a daily basis, the P2 has some oddities that do stand out.
The thought that the P2 needs to be easy to handsolder has been given significantly too much weight in my opinion..
Given the die size, the package chosen looks a good choice to me, and it's not that easy to hand solder...
'Next step' would be a QFN100, but that looks to also bring 0.4mm lead pitch, which certainly shift manufacturing costs.
BGA packages will come down to customer demand volumes, but the BGA package would not be much smaller than QFN, given the die size.
Those are not leads, they are wire bonds and from an EMI perspective should not be treated the same. OnSemi may have signed off on the bonding plan, but I doubt they are reviewing the design apart from a DFM perspective. From a theory of operation perspective, this layout includes risks. In my 27 years of electronics manufacturing positions, I have never seen a chip not have ground brought out to perimeter pins or multiple balls for numerous reasons, EMI being one...
I'm not following here - even if there were gull-gnd's, those wire bonds from the die do not go away - they just bond onto the gull lead.
The EMI of the EPAD based part is better than a gull-alone part.
Thermally, EPAD is way out in front.
I'm sure there are multiple down-bonds, more than there would be on a gull-gnd design, further improving the GND integrity.
My point may be off by using the term handsolder, but I meant that this package will be pretty easy to "solder at home". Some paste and a toaster oven, done.
The manufacturing cost difference between this package and a QFN100 should be nearly zero, unless being produced on a non standard line. In a standard process, both parts got through the exact same steps for placement, reflow, and inspection. The only difference is that this package would spend more time on AOI, but less time in X-Ray. The QFN would be opposite, but net the same from a cost perspective. (I developed very effective assembly quoting and costing models for 2 different EMS providers (CMs))
I think the BGA package option should not be looked at in terms of volume, but from that perspective, I hope that Parallax has plans big enough to support the BGA package. Given the die size, you don't have a lot of options for a "small BGA" anyhow, so size of the part shouldn't be a factor. A stronger factor is an appropriate package choice for the product. Also, given the number of IO and power dissipation specs discussed so far, package options are limited right from the start. However, I do believe that this package will work well for testing and qualifying the design. It's also a better match for Parallax's equipment so they can build dev boards in house. But if the expectation for P2 is what it should be, higher volumes will arise.
Internally, EMI may be better handled, but I am speaking of an overall perspective. This layout requires more effort on the part of the board designer to negate further EMI concerns (as well as heat), but with the concept of "simple" design, the part proves a challenge. In my opinion, much of the debate over PCB design for the P2 only exists because we are not talking about a proper 4 layer design as the package datasheet recommends. Moving to 4 layers mitigates nearly all of the concerns in this and other P2 PCBA threads.
Internally, EMI may be better handled, but I am speaking of an overall perspective. This layout requires more effort on the part of the board designer to negate further EMI concerns (as well as heat), but with the concept of "simple" design, the part proves a challenge. In my opinion, much of the debate over PCB design for the P2 only exists because we are not talking about a proper 4 layer design as the package datasheet recommends. Moving to 4 layers mitigates nearly all of the concerns in this and other P2 PCBA threads.
I'd tend to agree for a part with P2's MHz and Watts specs, that a 4L PCB should be early in the process, and then 2L done as the P2 chip experience is improved.
Of course, the simpler break-out PCBs are a bit of a special case, in that they do not have normal connections to other parts, or usual size constraints a commercial design would have.
The manufacturing cost difference between this package and a QFN100 should be nearly zero, unless being produced on a non standard line. In a standard process, both parts got through the exact same steps for placement, reflow, and inspection..
Yes, for the same lead pitch, I'd agree.
The only QFN100 I can find is at 0.4mm (unclear if P2 die can even fit?), and there are some manufacturing lines where 0.5mm is what they can manage.
I've seen IC vendors offer 0.4mm, and 0.5mm and even 0.8mm lead pitch parts, driven by the type of line they will go down. The 0.8mm (gull leads) I believe is wave-solderable ~minimum.
My point may be off by using the term handsolder, but I meant that this package will be pretty easy to "solder at home". Some paste and a toaster oven, done.
No, not "done" at all. There's the chasing and fixing of solder bridges, which is increasingly more difficult as lead pitch diminishes. This is only exacerbated by the fact that putting solder mask between lead pads is impossible at this scale, since the mask will lift from the board due to its hopelessly narrow inter-pad width. Syringing solder paste onto such a board will probably be out of the question. A paste screen will certainly be a minimum requirement for low-volume home soldering.
Parallax will definitely have to offer a minimalistic pre-soldered module if they expect wide acceptance among home and hobbyist adopters.
No, not "done" at all. There's the chasing and fixing of solder bridges, which is increasingly more difficult as lead pitch diminishes. This is only exacerbated by the fact that putting solder mask between lead pads is impossible at this scale, since the mask will lift from the board due to its hopelessly narrow inter-pad width. Syringing solder paste onto such a board will probably be out of the question. A paste screen will certainly be a minimum requirement for low-volume home soldering.
-Phil
This seems uneccesarily pessimistic
On the solder mask, we get boards made through the local PCB fab which have 144 pin TQFPs at 0.5mm pin pitch, and there is a solder mask in between each pin. They are indeed narrow, but there doesn't seem to be any problems with them lifting or not being well defined.
I also think the 'syringe line of solder' will work just fine. After all, during assembly in the oven, the solder tends to spread first if to communal puddle, before getting its act together and attaching to the nearest pin and pad.
I agree with your statement about parallax providing something preloaded, though
Here's a photo. there's a few bits of dust in this photo - I went back to the pcb to check what they were, and they've moved off.
My point may be off by using the term handsolder, but I meant that this package will be pretty easy to "solder at home". Some paste and a toaster oven, done.
No, not "done" at all. There's the chasing and fixing of solder bridges, which is increasingly more difficult as lead pitch diminishes.
-Phil
Well, for those that don't use a mylar, Kapton, or stainless stencil, yes.
Tubular, nice image, those are some very narrow mask strips. Drill alignment could use a nudge.
Comments
Anything rare in IC packaging, most certainly is a significant increase in package cost.
OnSemi needs to choose a high volume package.
I cannot seem to find any part codes that actually use that P-HLFQFP100-14x14-0.50 or PLQP0100KD-A ?
Correct
There are many 'leads to gnd' inside the package, ie the die's many GND pads wire bond onto the PAD area.
OnSemi are making this, so they must have signed off on the bonding plan.
Here is an image example, of exposed die paddle bonding, the connections are the 'down bond'
One advantage of the single big ground pad is from an EMC susceptability point of view, this thing isn't going to have the usual ground loops and associated noise injection from outside.
Unfortunately, when it comes to a 100 (101, in fact) pin, 14mm x 14mm, ~10mm square exposed pad LQFP, there are not many options out there.
I had also noticed that Renesas has dropped those packages to a 'limbo', mainly by the following reasons, IMHO:
- Cost (total cost of application, in fact), because smaller and cheaper options are available and on the raise (e.g., BGAs and their even smaller sons, CSPs);
- Geometry shrinks, 2.5D and 3D drives the mass markets, every IC designer/provider wants their products to become 'mobile', IOT, etc...
- QFPs, in general, grow in area and weight, as pin count grows. Area and weight are seen as being 'bad karma' for those growing markets;
- Only a few companies seems to have any concerns about their customers being able or not, to do hand solder or rework anything, very few indeed. Programmed obsolescence, conscious discarding and recycling of electronic devices are more than a culture; they are the utmost gear driving mass market engines.
Without any specific aiming and almost unconsciously, we did pulled that trigger. Where the bullet will hit, only at the future we will see.
The present P2 package seems a reasonable Thermal/handling point, given the large die size.
Possible future options will be firstly dictated by 'what is available' and 'what can fit', but the EPAD has bumped users pretty much to reflow process
The QFN100 I linked earlier might fit P2 Die, and it does have a nominally smaller** PCB footprint, but the QFN100 found is 0.4mm QFN, and that is a notch harder than 0.5mm TQFP
BGA seems to offer little size gain, given the large die dimensions ?
** QFN parts can look smaller, but if you cannot fit vias inside the pad ring, the finally fan-out area can be not much smaller than TQFP100.
I always just remove the HTTPS part and mostly it works as it does in this case.
Those are not leads, they are wire bonds and from an EMI perspective should not be treated the same. OnSemi may have signed off on the bonding plan, but I doubt they are reviewing the design apart from a DFM perspective. From a theory of operation perspective, this layout includes risks. In my 27 years of electronics manufacturing positions, I have never seen a chip not have ground brought out to perimeter pins or multiple balls for numerous reasons, EMI being one. As I said, time will tell and I of course will still be waiting for the BGA package version. The thought that the P2 needs to be easy to handsolder has been given significantly too much weight in my opinion. Then again, I am still wondering why Parallax didn't partner with TSI as a foundry since they are literally 10 minutes away. I am sure there are reasons that I am unaware of for many of my questions, but when compared to all the other chips I deal with on a daily basis, the P2 has some oddities that do stand out.
'Next step' would be a QFN100, but that looks to also bring 0.4mm lead pitch, which certainly shift manufacturing costs.
BGA packages will come down to customer demand volumes, but the BGA package would not be much smaller than QFN, given the die size.
I'm not following here - even if there were gull-gnd's, those wire bonds from the die do not go away - they just bond onto the gull lead.
The EMI of the EPAD based part is better than a gull-alone part.
Thermally, EPAD is way out in front.
I'm sure there are multiple down-bonds, more than there would be on a gull-gnd design, further improving the GND integrity.
The manufacturing cost difference between this package and a QFN100 should be nearly zero, unless being produced on a non standard line. In a standard process, both parts got through the exact same steps for placement, reflow, and inspection. The only difference is that this package would spend more time on AOI, but less time in X-Ray. The QFN would be opposite, but net the same from a cost perspective. (I developed very effective assembly quoting and costing models for 2 different EMS providers (CMs))
I think the BGA package option should not be looked at in terms of volume, but from that perspective, I hope that Parallax has plans big enough to support the BGA package. Given the die size, you don't have a lot of options for a "small BGA" anyhow, so size of the part shouldn't be a factor. A stronger factor is an appropriate package choice for the product. Also, given the number of IO and power dissipation specs discussed so far, package options are limited right from the start. However, I do believe that this package will work well for testing and qualifying the design. It's also a better match for Parallax's equipment so they can build dev boards in house. But if the expectation for P2 is what it should be, higher volumes will arise.
Internally, EMI may be better handled, but I am speaking of an overall perspective. This layout requires more effort on the part of the board designer to negate further EMI concerns (as well as heat), but with the concept of "simple" design, the part proves a challenge. In my opinion, much of the debate over PCB design for the P2 only exists because we are not talking about a proper 4 layer design as the package datasheet recommends. Moving to 4 layers mitigates nearly all of the concerns in this and other P2 PCBA threads.
Of course, the simpler break-out PCBs are a bit of a special case, in that they do not have normal connections to other parts, or usual size constraints a commercial design would have.
Yes, for the same lead pitch, I'd agree.
The only QFN100 I can find is at 0.4mm (unclear if P2 die can even fit?), and there are some manufacturing lines where 0.5mm is what they can manage.
I've seen IC vendors offer 0.4mm, and 0.5mm and even 0.8mm lead pitch parts, driven by the type of line they will go down. The 0.8mm (gull leads) I believe is wave-solderable ~minimum.
No, not "done" at all. There's the chasing and fixing of solder bridges, which is increasingly more difficult as lead pitch diminishes. This is only exacerbated by the fact that putting solder mask between lead pads is impossible at this scale, since the mask will lift from the board due to its hopelessly narrow inter-pad width. Syringing solder paste onto such a board will probably be out of the question. A paste screen will certainly be a minimum requirement for low-volume home soldering.
Parallax will definitely have to offer a minimalistic pre-soldered module if they expect wide acceptance among home and hobbyist adopters.
-Phil
This seems uneccesarily pessimistic
On the solder mask, we get boards made through the local PCB fab which have 144 pin TQFPs at 0.5mm pin pitch, and there is a solder mask in between each pin. They are indeed narrow, but there doesn't seem to be any problems with them lifting or not being well defined.
I also think the 'syringe line of solder' will work just fine. After all, during assembly in the oven, the solder tends to spread first if to communal puddle, before getting its act together and attaching to the nearest pin and pad.
I agree with your statement about parallax providing something preloaded, though
Here's a photo. there's a few bits of dust in this photo - I went back to the pcb to check what they were, and they've moved off.
Well, for those that don't use a mylar, Kapton, or stainless stencil, yes.
Tubular, nice image, those are some very narrow mask strips. Drill alignment could use a nudge.